Patents by Inventor Weiwei Ge

Weiwei Ge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894457
    Abstract: Disclosed is a semiconductor device and a method for manufacturing the same. The semiconductor device comprises a drift region on a substrate, a well region on the drift region, a source-end doped region in the well region, a drain-end doped region on the drift region, and a gate structure which is located between a source end and a drain end, located at a position of the well region, and forms a channel region in the well region. The source-end doped region comprises a first doped region and a second doped region with opposite doping types, the channel region connects the first doped region and the drift region. The first doped region and the second doped region of the source end are equivalently close to the gate structure, a distance between the second doped region and a PN junction surface formed by the drift region and the well region is reduced.
    Type: Grant
    Filed: May 9, 2021
    Date of Patent: February 6, 2024
    Assignee: JOULWATT TECHNOLOGY CO., LTD.
    Inventor: Weiwei Ge
  • Publication number: 20210351296
    Abstract: Disclosed is a semiconductor device and a method for manufacturing the same. The semiconductor device comprises a drift region on a substrate, a well region on the drift region, a source-end doped region in the well region, a drain-end doped region on the drift region, and a gate structure which is located between a source end and a drain end, located at a position of the well region, and forms a channel region in the well region. The source-end doped region comprises a first doped region and a second doped region with opposite doping types, the channel region connects the first doped region and the drift region. The first doped region and the second doped region of the source end are equivalently close to the gate structure, a distance between the second doped region and a PN junction surface formed by the drift region and the well region is reduced.
    Type: Application
    Filed: May 9, 2021
    Publication date: November 11, 2021
    Applicant: Joulwatt Technology Co., Ltd.
    Inventor: WEIWEI GE
  • Patent number: 11094040
    Abstract: A noise detection method for time-series vegetation index (TSVI) derived from remote sensing images. Firstly, unit root test is used to classify observation values of each pixel into a stationary series or a non-stationary series; for the non-stationary, an appropriate mathematical model is used to model discrete TSVI, then differences between actual observation values and prediction values of the model are calculated and recorded as a deviation. As the deviation has removed seasonal components, the non-stationary series is transformed into a stationary series. For a stationary series or deviation data, noise detection is performed based on the assumption that observation values are distributed within a certain range around mean values; then model fitting and noise detection are iteratively carried out with remained observation values—until the iterations reached the maximum number or no noise is detected at one iteration.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: August 17, 2021
    Assignee: ZHEJIANG UNIVERSITY OF TECHNOLOGY
    Inventors: Wei Wu, Jiancheng Luo, Ying Shen, Tingting Chen, Weiwei Ge, Zhenqian Chen, Liegang Xia
  • Publication number: 20210175336
    Abstract: The present disclosure relates to a lateral double-diffused transistor and a manufacturing method of the transistor. The transistor comprises: a substrate; a well region and a drift region both located in the top of the substrate, a source region located in the well region, and a drain region located in the drift region; a first dielectric layer located on a surface of the drift region; a first field plate layer located above the drift region and covering a first portion of the first dielectric layer; a second dielectric layer covering a surface of part of the first field plate layer and stacked on a surface of a second portion of the first dielectric layer; a second field plate layer located on a surface of the second dielectric layer, comprising at least one contact channel. According to the present disclosure, the transistor increases breakdown voltage and reduces on-state resistance.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 10, 2021
    Applicant: Joulwatt Technology (Hangzhou) Co., Ltd.
    Inventors: Yang LU, Guangtao HAN, WEIWEI Ge
  • Publication number: 20210027429
    Abstract: A noise detection method for time-series vegetation index (TSVI) derived from remote sensing images. Firstly, unit root test is used to classify observation values of each pixel into a stationary series or a non-stationary series; for the non-stationary, an appropriate mathematical model is used to model discrete TSVI, then differences between actual observation values and prediction values of the model are calculated and recorded as a deviation. As the deviation has removed seasonal components, the non-stationary series is transformed into a stationary series. For a stationary series or deviation data, noise detection is performed based on the assumption that observation values are distributed within a certain range around mean values; then model fitting and noise detection are iteratively carried out with remained observation values—until the iterations reached the maximum number or no noise is detected at one iteration.
    Type: Application
    Filed: November 19, 2019
    Publication date: January 28, 2021
    Inventors: Wei WU, Jiancheng LUO, Ying SHEN, Tingting CHEN, Weiwei GE, Zhenqian CHEN, Liegang XIA
  • Patent number: 9620638
    Abstract: A tri-gate laterally-diffused metal oxide semiconductor (LDMOS), including a substrate, a P-type semiconductor region, a P-type contact region, an N-type source region, a gate dielectric layer, an N-type drift region, a first isolation dielectric layer, an N-type drain region, and a second isolation dielectric layer. The P-type semiconductor region is disposed on one end of an upper surface of the substrate, and the N-type drift region is disposed on another end of the upper surface. The P-type semiconductor region contacts with the N-type drift region. The P-type contact region and the N-type source region are disposed on one side of the P-type semiconductor region which is away from the N-type drift region, and compared with the P-type contact region, the N-type source region is in the vicinity of the N-type drift region.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: April 11, 2017
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Xiaorong Luo, Weiwei Ge, Junfeng Wu, Da Ma, Mengshan Lv, Linhua Huang, Qing Liu, Tao Sun