Abstract: A method and apparatus for decoding received digital data representing video, audio, information or a combination thereof. After a forward error correction (FEC) frame sync lock is detected, a counter is incremented corresponding to the number of identical control words decoded from the received data. If the number of identical control words is above a threshold value, the control word is used to operate the decoder in a mode corresponding to the control word. Otherwise, the system repeats the operation of determining whether a FEC frame sync lock is detected.

Abstract: A method and apparatus for reliably detecting MPEG-2 packet sync-byte positions received via a digital transmission system in the event of a packet stream containing a plurality of null packets of a plurality of packets containing a fixed repeating bit pattern and for reliably synchronizing and delivering the MPEG-2 stream broadcast to the receiver transport layer. A Null-Packet Detector compares the content of the current packet with a fixed (or predetermined) bit pattern to detect a null packet to reliably identify the location of the sync-byte of the null packet. a sync-byte position is identified based upon the position of the predetermined fixed bit pattern in the header portion of a plurality of null-packets in the stream.

Abstract: A system is described for establishing timing synchronism between a local receiver symbol clock and a transmitter symbol clock. A prescribed number of offset values are calculated for desired symbol timing range, the offset values being grouped substantially symmetrically about a central offset value. Each of the preselected offset values are tested to see if symbol timing recovery lock can be achieved by starting at the central offset value and gradually moving away from such value. Finally, two timing detection algorithms are used and switched between the two algorithms is carried out as desired to maximize the possibility of STR lock.

Abstract: A method and apparatus for decoding received digital data representing video, audio, information or a combination thereof. After a forward error correction (FEC) frame sync lock is detected, a counter is incremented corresponding to the number of identical control words decoded from the received data. If the number of identical control words is above a threshold value, the control word is used to operate the decoder in a mode corresponding to the control word. Otherwise, the system repeats the operation of determining whether a FEC frame sync lock is detected.

Abstract: A method and apparatus for identifying a false MPEG-2 packet synchronization lock condition by parsing MPEG-2 packets that may have been incorrectly delineated by a sync-byte checksum-decoder, to detect resulting anomalies. Forcing the restart of the conventional checksum-encoded sync-byte synchronization/lock process upon generating a “resync” command based upon the anomalies detected by a False Lock Detector. Reliably synchronizing and delivering the MPEG-2 stream to the receiver transport layer. The False-Lock Detector circuit compares the content of the currently identified packet header or payload portion of a sync-byte delineated packet with expected values in order to detect a false-lock condition and to eliminate false sync-byte position-candidates from the basis of a “synchronization lock”.

Abstract: Channel acquisition in a digital television signal receiver is improved by determining the carrier tracking loop frequency offsets and the symbol timing recovery offsets for each channel in the television receiver. Offsets are stored in respective EEPROMs for each channel. When a channel is to be acquired in the TV receiver the tune command will be applied to the appropriate EEPROMs and the respective values are conveyed to the VSB demodulator to start acquisition of the channel.

Abstract: A method and apparatus for reliably detecting MPEG-2 packet sync-byte positions received via a digital transmission system in the event of a packet stream containing a plurality of null packets or a plurality of packets containing a fixed repeating bit pattern and for reliably synchronizing and delivering the MPEG-2 stream broadcast to the receiver transport layer. A Null-Packet Detector compares the content of the current packet with a fixed (or predetermined) bit pattern to detect a null packet to reliably identify the location of the sync-byte of the null packet. A sync-byte position is identified based upon the position of the predetermined fixed bit pattern in the header portion of a plurality of null-packets in the stream.

Abstract: Channel acquisition in a digital television signal receiver is improved by determining the carrier tracking loop frequency offsets and the symbol timing recovery offsets for each channel in the television receiver. Offsets are stored in respective EEPROMs for each channel. When a channel is to be acquired in the TV receiver the tune command will be applied to the appropriate EEPROMs and the respective values are conveyed to the VSB demodulator to start acquisition of the channel.

Abstract: A system is described for establishing timing synchronism between a local receiver symbol clock and a transmitter symbol clock. A prescribed number of offset values are calculated for desired symbol timing range, the offset values being grouped substantially symmetrically about a central offset value. Each of the preselected offset values are tested to see if symbol timing recovery lock can be achieved by starting at the central offset value and gradually moving away from such value. Finally, two timing detection algorithms are used and switched between the two algorithms is carried out as desired to maximize the possibility of STR lock.