Patents by Inventor WEIXING DU

WEIXING DU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11933850
    Abstract: A device for detecting a slot wedge, an air gap and a broken rotor bar is provided, where a sequential circuit generates double concurrent pulses; the sequential circuit is connected to driving power modules; the driving power modules are connected to front-end interface circuits; the front-end interface circuits convert the double concurrent pulses into corresponding magnetic-field pulses; the magnetic-field pulses are transmitted to power supply terminals on adjacent phases of stator windings through impedance matching pins and coupled at a corresponding coil, air gap and squirrel cage rotor to generate single groups of cyclic rotating magnetic potentials; single rotating magnetic potentials are sequentially generated in adjacent slots on each of the phases of the stator windings; rotating electric potentials in magnetic circuits with two symmetrical phases are magnetically coupled to form distributed coupling magnetic field reflected full-cycle waves for reflecting a difference of a corresponding slot wedg
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: March 19, 2024
    Assignee: HANGZHOU HENUOVA TECHNOLOGY CO., LTD.
    Inventors: Yuewu Zhang, Weixing Yang, Boyan Zhao, Jie Luo, Gang Du, Chao Wang, Han Gao, Liwei Qiu, Ming Xu, Jiamin Li, Yanxing Bao, Qianyi Zhang, Zuting Cao, Junliang Liu
  • Publication number: 20240055508
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a doped nitride-based semiconductor layer, a gate electrode, and a protection layer. The doped nitride-based semiconductor layer has a first portion and a second portion over the first portion and narrower than the first portion. The gate electrode is disposed over the doped nitride-based semiconductor layer and narrower than the first portion. The protection layer is disposed over the doped nitride-based semiconductor layer and the gate electrode. A top surface of the first portion of the doped nitride-based semiconductor layer is covered by the protection layer, and a sidewall of the first portion of the doped nitride-based semiconductor layer is free from coverage by the protection layer.
    Type: Application
    Filed: January 11, 2022
    Publication date: February 15, 2024
    Inventors: Jian RAO, Jheng-Sheng YOU, Weixing DU, Ming-Hong CHANG
  • Publication number: 20240038887
    Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a gate electrode, and a doped nitride-based semiconductor layer. The doped nitride-based semiconductor layer is disposed between the second nitride-based semiconductor layer and the gate electrode. The doped nitride-based semiconductor layer has a pair of opposite ledge portions free from coverage of the gate electrode and a central portion therebetween. The second nitride-based semiconductor layer has a first portion beneath the central portion and a second portion beneath the ledge portion, and the second nitride-based semiconductor layer has a doping concentration of a dopant that selected from a highly electronegative group, in which the doping concentration from the first portion to the second portion increases.
    Type: Application
    Filed: December 31, 2021
    Publication date: February 1, 2024
    Inventors: Ziming DU, Changan LI, Weixing DU, Jheng-Sheng YOU
  • Publication number: 20240030331
    Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a doped nitride-based semiconductor layer, a gate electrode, a first oxynitride dielectric layer, a first passivation layer, a second oxynitride dielectric layer, a second passivation layer, and a S/D electrode. The first oxynitride dielectric layer is disposed over the second nitride-based semiconductor layer and conformally covers the doped nitride-based semiconductor layer and the gate electrode. The first passivation layer is disposed on the first oxynitride dielectric layer and in contact with the first oxynitride dielectric layer. The second oxynitride dielectric layer is disposed on the first passivation layer and in contact with the first passivation layer. The second passivation layer is disposed on the second oxynitride dielectric layer and in contact with the second oxynitride dielectric layer.
    Type: Application
    Filed: August 6, 2021
    Publication date: January 25, 2024
    Inventors: Yang LIU, Weixing DU, Pan WANG, Jheng-Sheng YOU
  • Patent number: 11854887
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a group III-V layer disposed on the substrate, a dielectric layer disposed on the group III-V layer, and an inclined sidewall extending from the dielectric layer to the substrate. Wherein the substrate comprising a relative rough surface opposite the inclined sidewall.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: December 26, 2023
    Assignee: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.
    Inventors: Weixing Du, Yulong Zhang, Jue Ouyang, Minghong Chang
  • Publication number: 20230369423
    Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a source electrode and a drain electrode, a gate structure, a first passivation layer, a second passivation layer and a field plate. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The source electrode, the drain electrode, and the gate structure are disposed above the second nitride-based semiconductor layer. The first passivation layer is disposed above the second nitride-based semiconductor layer and covers the gate structure. The second passivation layer is disposed above the first passivation layer and in a region between the source and drain electrodes. The field plate is disposed above the second passivation layer and in the region between the source electrode and drain electrode, in which the field plate contacts at least one enclosed air gap above the first passivation layer.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 16, 2023
    Inventors: Weixing DU, Jheng-Sheng YOU
  • Publication number: 20230369424
    Abstract: A nitride-based semiconductor device includes a first and a second nitride-based semiconductor layers, a source electrode and a drain electrode, a gate structure, a passivation layer and a field plate. The passivation layer is disposed above the second nitride-based semiconductor layer and covers the gate structure and has an enclosed air gap between the gate structure and the drain electrode. The field plate is disposed above the passivation layer and has a first portion directly over the gate structure and a second portion directly over the air gap. The second portion is separated from the air gap by at least one dielectric of the passivation layer.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 16, 2023
    Inventors: Jheng-Sheng YOU, Weixing DU
  • Patent number: 11777023
    Abstract: A semiconductor device includes a substrate, a first GaN-based high-electron-mobility transistor (HEMT), a second GaN-based HEMT, a first interconnection, and a second interconnection is provided. The substrate has a plurality of first-type doped semiconductor regions and second-type doped semiconductor regions. The first GaN-based HEMT is disposed over the substrate to cover a first region on the first-type doped semiconductor regions and the second-type doped semiconductor regions in the substrate. The second GaN-based HEMT is disposed over the substrate to cover a second region. The first region is different from the second region. The first interconnection is disposed over and electrically connected to the substrate, forming a first interface. The second interconnection is disposed over and electrically connected to the substrate, forming a second interface. The first interface is separated from the second interface by at least two heterojunctions formed in the substrate.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: October 3, 2023
    Assignee: Innoscience (Suzhou) Technology Co., Ltd.
    Inventors: Weixing Du, Jheng-Sheng You
  • Publication number: 20230215912
    Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a group of negatively-charged ions. The gate electrode is located between the source and drain electrodes to define a drift region between the gate and drain electrodes. A group of negatively-charged ions are implanted into the drift region and over the 2DEG region and spaced apart from the gate and drain electrodes and spaced apart from an area directly beneath the gate and drain electrodes. The gate electrode is closer to the negatively-charged ions than the drain electrode, such that the negatively-charged ions deplete at least one portion of the 2DEG region which is near the gate electrode.
    Type: Application
    Filed: March 9, 2022
    Publication date: July 6, 2023
    Inventors: Ziming DU, Changan LI, Weixing DU, Jheng-Sheng YOU
  • Publication number: 20230215939
    Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a group of negatively-charged ions, and a field plate. The gate electrode and the drain electrode disposed above the second nitride-based semiconductor layer to define a drift region therebetween. The group of negatively-charged ions are implanted into the drift region and spaced apart from an area directly beneath the gate and drain electrodes to form at least one high resistivity zone in the second nitride-based semiconductor layer. The field plate is disposed over the gate electrode and extends in a region between the gate electrode and the high resistivity zone.
    Type: Application
    Filed: March 9, 2022
    Publication date: July 6, 2023
    Inventors: Ziming DU, Changan LI, Weixing DU, Jheng-Sheng YOU
  • Publication number: 20220302295
    Abstract: A semiconductor device includes a substrate, a first GaN-based high-electron-mobility transistor (HEMT), a second GaN-based HEMT, a first interconnection, and a second interconnection is provided. The substrate has a plurality of first-type doped semiconductor regions and second-type doped semiconductor regions. The first GaN-based HEMT is disposed over the substrate to cover a first region on the first-type doped semiconductor regions and the second-type doped semiconductor regions in the substrate. The second GaN-based HEMT is disposed over the substrate to cover a second region. The first region is different from the second region. The first interconnection is disposed over and electrically connected to the substrate, forming a first interface. The second interconnection is disposed over and electrically connected to the substrate, forming a second interface. The first interface is separated from the second interface by at least two heterojunctions formed in the substrate.
    Type: Application
    Filed: October 20, 2020
    Publication date: September 22, 2022
    Inventors: Weixing DU, Jheng-Sheng YOU
  • Publication number: 20220122885
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a group III-V layer disposed on the substrate, a dielectric layer disposed on the group III-V layer, and an inclined sidewall extending from the dielectric layer to the substrate. Wherein the substrate comprising a relative rough surface opposite the inclined sidewall.
    Type: Application
    Filed: April 10, 2020
    Publication date: April 21, 2022
    Inventors: WEIXING DU, YULONG ZHANG, JUE OUYANG, MINGHONG CHANG