Abstract: Techniques are disclosed for generating a plurality of output voltages from a single input power source. The techniques include implementing a switched capacitor voltage converter to provide at least two output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the power source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches to define at least a first and a second mode with each of the modes having a plurality of configurations. In accordance with aspects of the disclosure, the techniques include coupling the plurality of capacitors to define the first or second mode based on predetermined criteria.

Abstract: A device for generating a plurality of output voltages from a single input energy supply source is described. The device includes a switched capacitor voltage converter that provides each of the output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the energy supply source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches that dynamically configure the capacitors into a plurality of stacked configurations. Switching between the plurality of stacked configurations may be controlled based on predetermined criteria.

Abstract: Apparatus and methods configured to perform power regulation for an implantable device are presented. In an aspect, an implantable device can include a substrate that forms at least part of a body of the implantable device and a circuit disposed on or within the substrate. The circuit can include a high load power regulator configured to provide a first current level to components of the implantable device and a low load power regulator configured to provide a second current level to components of the implantable device, wherein the second current level is lower that the first current level. The circuit can also include a regulator switch configured to enable or disable current draw from the high load power regulator and the low load power regulator as a function of power state and associated power requirement of the components of the implantable device.

Abstract: A device for generating a plurality of output voltages from a single input energy supply source is described. The device includes a switched capacitor voltage converter that provides each of the output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the energy supply source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches that dynamically configure the capacitors into a plurality of stacked configurations. Switching between the plurality of stacked configurations may be controlled based on predetermined criteria.

Abstract: Various techniques are described for periodically performing a calibration routine to calibrate a low-power system clock within an implantable medical device (IMD) based on a high accuracy reference clock also included in the IMD. The system clock is powered continuously, and the reference clock is only powered on during the calibration routine. The techniques include determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles, and adjusting a trim value of the system clock to compensate for the clock error. Calibrating the system clock with a delta-sigma loop, for example, reduces the clock error over time. This allows accurate adjustment of the system clock to compensate for errors due to trim resolution, circuit noise and temperature.

Abstract: A device for generating a plurality of output voltages from a single input energy supply source is described. The device includes a switched capacitor voltage converter that provides each of the output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the energy supply source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches that dynamically configure the capacitors into a plurality of stacked configurations. Switching between the plurality of stacked configurations may be controlled based on predetermined criteria.

Abstract: Various techniques are described for periodically performing a calibration routine to calibrate a low-power system clock within an implantable medical device (IMD) based on a high accuracy reference clock also included in the IMD. The system clock is powered continuously, and the reference clock is only powered on during the calibration routine. The techniques include determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles, and adjusting a trim value of the system clock to compensate for the clock error. Calibrating the system clock with a delta-sigma loop, for example, reduces the clock error over time. This allows accurate adjustment of the system clock to compensate for errors due to trim resolution, circuit noise and temperature.

Abstract: Apparatus and methods configured to perform power regulation for an implantable device are presented. In an aspect, an implantable device can include a substrate that forms at least part of a body of the implantable device and a circuit disposed on or within the substrate. The circuit can include a high load power regulator configured to provide a first current level to components of the implantable device and a low load power regulator configured to provide a second current level to components of the implantable device, wherein the second current level is lower that the first current level. The circuit can also include a regulator switch configured to enable or disable current draw from the high load power regulator and the low load power regulator as a function of power state and associated power requirement of the components of the implantable device.

Abstract: A device for generating a plurality of output voltages from a single input energy supply source is described. The device includes a switched capacitor voltage converter that provides each of the output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the energy supply source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches that dynamically configure the capacitors into a plurality of stacked configurations. Switching between the plurality of stacked configurations may be controlled based on predetermined criteria.

Abstract: Techniques are disclosed for generating a plurality of output voltages from a single input power source. The techniques include implementing a switched capacitor voltage converter to provide at least two output voltages having different supply ratios. The supply ratio is defined as a function of the input voltage provided to the switched capacitor voltage converter by the power source. The switched capacitor voltage converter includes a plurality of capacitors selectively coupled to a plurality of switches to define at least a first and a second mode with each of the modes having a plurality of configurations. In accordance with aspects of the disclosure, the techniques include coupling the plurality of capacitors to define the first or second mode based on predetermined criteria.

Abstract: Various techniques are described for periodically performing a calibration routine to calibrate a low-power system clock within an implantable medical device (IMD) based on a high accuracy reference clock also included in the IMD. The system clock is powered continuously, and the reference clock is only powered on during the calibration routine. The techniques include determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles, and adjusting a trim value of the system clock to compensate for the clock error. Calibrating the system clock with a delta-sigma loop, for example, reduces the clock error over time. This allows accurate adjustment of the system clock to compensate for errors due to trim resolution, circuit noise and temperature.

Abstract: Voltage supply and method having a first reference and a second reference. The first reference has an operation mode configured to supply a first reference voltage at a first accuracy and consume an operation power and a standby mode configured to consume standby power less than the operation power. The second reference is configured to supply a second reference having a second accuracy less than the first accuracy of the first reference and which consumes a second reference power less than the operation power of the first reference, the second reference voltage being trimmable based, at least in part, on a comparison of the first reference voltage to the second reference voltage.

Abstract: Various techniques are described for periodically performing a calibration routine to calibrate a low-power system clock within an implantable medical device (IMD) based on a high accuracy reference clock also included in the IMD. The system clock is powered continuously, and the reference clock is only powered on during the calibration routine. The techniques include determining a clock error of the system clock based on a difference between frequencies of the system clock and the reference clock over a fixed number of clock cycles, and adjusting a trim value of the system clock to compensate for the clock error. Calibrating the system clock with a delta-sigma loop, for example, reduces the clock error over time. This allows accurate adjustment of the system clock to compensate for errors due to trim resolution, circuit noise and temperature.