Abstract: A retrieval apparatus, a method, and a storage medium are disclosed. The retrieval apparatus includes a memory and a processor, wherein the processor is configured to acquire a retrieval request, and the retrieval request includes the query vector; according to the query vector, generate and execute a first access request corresponding to the first memory according to the first graph index and the index node in the candidate pool; determine and process the data acquired by the first access request corresponding to the first memory, corresponding to the absence of redundant data in the previous storage pool, and store the result in the result pool; and output the data in the result pool corresponding to the candidate pool does not include unreachable index nodes. The retrieval apparatus improves the efficiency of the data reading process and further improves the efficiency of the retrieval process.

Abstract: A retrieval apparatus, a method, and a storage medium are disclosed. The retrieval apparatus includes a memory and a processor, wherein the processor is configured to acquire a retrieval request, and the retrieval request includes the query vector; according to the query vector, generate and execute a first access request corresponding to the first memory according to the first graph index and the index node in the candidate pool; determine and process the data acquired by the first access request corresponding to the first memory, corresponding to the absence of redundant data in the previous storage pool, and store the result in the result pool; and output the data in the result pool corresponding to the candidate pool does not include unreachable index nodes. The retrieval apparatus improves the efficiency of the data reading process and further improves the efficiency of the retrieval process.

Abstract: A method for entity relations extraction including applying entity markers to a set of sentences included in a data bag to generate a token sequence for a subset of the set of sentences, the token sequence including a beginning position mark and an ending position mark of a corresponding sentence, as well as a front position mark and a rear position mark of at least one entity included in each of the subset of the set of sentences; using the generated token sequences of the set of sentences with a pre-trained language representation model to generate a sentence feature vector for each sentence included in the data bag; aggregating, in a data encoding module, the sentence feature vectors of the set of sentences into a bag encoding vector; and classifying data entity relations of the set of sentences included in the data bag through decoding and inferencing the bag encoding vector.

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

Abstract: There is provided a signal processing apparatus including a learning unit that learns a plurality of base signals of which coefficients become sparse, for each of features of signals, such that the signals are represented by a linear operation of the plurality of base signals.

Abstract: Multiple lock assemblies are distributed on a chip, each lock assembly manage a lock application message for applying for a lock and a lock release message for releasing a lock that are sent by one small core. Specifically, embodiments include receiving a lock message sent by a small core, where the lock message carries a memory address corresponding to a lock requested by a first thread in the small core; calculating, using the memory address of the requested lock, a code number of a lock assembly to which the requested lock belongs; and sending the lock message to the lock assembly corresponding to the code number, to request the lock assembly to process the lock message.

Abstract: There is provided a signal processing apparatus including a learning unit that learns a plurality of base signals of which coefficients become sparse, for each of features of signals, such that the signals are represented by a linear operation of the plurality of base signals.

Abstract: There is provided a signal processing apparatus including a learning unit that learns a plurality of base signals of which coefficients become sparse, using a cost function including a term showing a correspondence between the coefficients, such that signals are represented by a linear operation of the plurality of base signals.