Patents by Inventor Wen-An Liang

Wen-An Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10453832
    Abstract: A three-dimensional (3D) integrated circuit (IC) includes a first IC die and a second IC die. The first IC die includes a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The second IC die includes a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: October 22, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Ming Wu, Kuan-Liang Liu, Wen-De Wang, Yung-Lung Lin
  • Publication number: 20190319173
    Abstract: A narrower LED package structure with sideways output of light suitable for a light guide plate includes two first electrodes, a package body, a cover layer, and two second electrodes. The LED chip is mounted on the first electrodes. The package body encapsulates the first electrodes, and surrounds the LED chip to define a light emitting region. The cover layer infills the light emitting region and covers the LED chip. The second electrodes are positioned outside the package body. Along a plane parallel to the first electrodes, a surface area of the two second electrodes is greater than a surface area of the portion of the two first electrodes positioned in the light emitting region.
    Type: Application
    Filed: May 7, 2018
    Publication date: October 17, 2019
    Inventors: Hou-Te LIN, Yi-Sen LIN, Chin-Fu CHENG, Wen-Liang TSENG, Pin-Chuan CHEN
  • Publication number: 20190304828
    Abstract: The present disclosure, in some embodiments, relates to a debonding and cleaning apparatus. The apparatus has a debonding module configured to separate semiconductor substrates from carrier substrates. A first cleaning module is configured to clean surfaces of a first plurality of the semiconductor substrates and a second cleaning module is configured to clean surfaces of a second plurality of the semiconductor substrates. The apparatus also has a first substrate handling module including a first robotic arm in communication with the debonding module and a second substrate handling module including a second robotic arm that is located between the first cleaning module and the second cleaning module. The second substrate handling module is configured to transfer the first plurality of the semiconductor substrates to first cleaning module and to transfer the second plurality of the semiconductor substrates to the second cleaning module.
    Type: Application
    Filed: June 18, 2019
    Publication date: October 3, 2019
    Inventors: Wen-Chih Chiou, Yu-Liang Lin, Hung-Jung Tu
  • Publication number: 20190300615
    Abstract: The present disclosure provides an antibody-containing aqueous formulation, comprising a therapeutically effective amount of an anti-interleukin-6 receptor antibody, a protein stabilizer, a surfactant, and a buffer. The buffer is an acetate buffer or a histidine buffer, and the antibody-containing aqueous formulation has a pH ranging from 4.5 to 6.5.
    Type: Application
    Filed: April 1, 2019
    Publication date: October 3, 2019
    Inventors: JHENG-GANG YANG, JIUNG-LIANG LIU, WEN-CHENG CHANG
  • Publication number: 20190295849
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.
    Type: Application
    Filed: June 11, 2019
    Publication date: September 26, 2019
    Inventors: I-Fan Chang, Yen-Liang Wu, Wen-Tsung Chang, Jui-Ming Yang, Jie-Ning Yang, Chi-Ju Lee, Chun-Ting Chiang, Bo-Yu Su, Chih-Wei Lin, Dien-Yang Lu
  • Patent number: 10424550
    Abstract: A multi-band antenna package structure includes a first redistribution layer; an integrated circuit layer, formed on the first redistribution layer, comprising at least one metal via, at least one metal pillar, an integrated circuit chip, and a molding layer, wherein the molding layer is used to fill openings formed by the metal via, the metal pillar and the integrated circuit chip which are disposed on the first redistribution layer, the metal via is electrically connected to one of the first metal patterns of the first redistribution layer; a second redistribution layer, formed on the integrated circuit layer; and a first antenna unit layer, comprising a first dielectric layer and third metal patterns formed in openings of the first dielectric layer, wherein at least one of the third metal patterns is electrically connected to one of the second metal patterns, and the third metal patterns form a first antenna unit.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: September 24, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Ching-Wen Chiang, Yen-Cheng Kuan, Chia-Jen Liang, Chien-Te Yu
  • Publication number: 20190287708
    Abstract: The large-current inductor includes a first core member having a first winding piece, a second winding piece, a first indentation, and a second indentation; a second core member having a third winding piece, a fourth winding piece, a third indentation, and a fourth indentation; a third core member attached and joined to first lateral sides of the first and second core members; and a fourth core member attached and joined to second lateral sides of the first and second core members. A first coil member winds around the first and third winding pieces, and has its ends embedded into the first and third indentations. A second coil member winds around the second and fourth winding pieces, and has its ends embedded into the second and fourth indentations. The inductor enhances efficiency of energy storage by mutual inductance, and limits large current flow by leakage inductance.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Inventors: Hsiu-Fa Yeh, Pin-Yu Chen, Hang-Chun Lu, Ya-Wen Yang, Shih-Kai Huang, Chien-Chin Chang, Hung-Chih Liang, Yu-Ting Hsu
  • Patent number: 10418407
    Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: September 17, 2019
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
  • Patent number: 10418251
    Abstract: A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: September 17, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Jiun Shen, Ssu-I Fu, Yen-Liang Wu, Chia-Jong Liu, Yu-Hsiang Hung, Chung-Fu Chang, Man-Ling Lu, Yi-Wei Chen
  • Patent number: 10408923
    Abstract: A laser radar device comprises a laser projecting system and a laser radar detecting system. The laser projecting system comprises a laser diode; and a light source orientation adjustment unit comprising a collimating lens and a Powell lens to modulate the angle at which the first incident laser beam is projected onto an object. The laser radar detecting system comprises at least two laser radar detection units disposed in the horizontal direction and vertical direction of the object, respectively. The laser radar detection units each comprise a wedge-shaped lens, an aspherical lens system and an optical detector. By designing optical parameters of the wedge-shaped lens and stacking the laser radar detection units in the horizontal direction and vertical direction, it is feasible to facilitate overall device manufacturing and processing, meet R&D needs, and adjust an optical system in its entirety easily.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 10, 2019
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chao-Wen Liang, Li-Tsun Wang, Shih-Che Chien, Yu-Sung Hsiao
  • Publication number: 20190274154
    Abstract: Provided in the present invention are an uplink-downlink data processing method and device, and computer storage medium. The method comprises: determining a timing interval, wherein the timing interval comprises an uplink scheduling time interval or a downlink data feedback timing interval, if a single timing interval is determined, then the timing interval is configured to be a non-integer multiple of the transmission time interval (TTI), and if a group of timing intervals is determined, then the determined group of timing intervals is configured to have at least one timing interval being a non-integer multiple of the TTI; and performing, according to the determined timing interval, uplink scheduling or downlink data feedback.
    Type: Application
    Filed: November 4, 2016
    Publication date: September 5, 2019
    Inventors: Jing SHI, Shuqiang XIA, Zhisong ZUO, Donglei CHEN, Wen ZHANG, Xianghui HAN, Chunli LIANG, Min REN
  • Patent number: 10404129
    Abstract: An electric motor for a blower and the like has a commutator and a brush assembly for making electrical contact with the commutator. The brush assembly includes a brush holder and a brush slidably mounted to the brush holder. The brush holder includes a brush holder plate and a side portion extending from the brush holder plate. The brush is arc-shaped and includes a first surface contacting the brush holder plate and a second surface contacting the side portion of the brush holder. The side portion of the brush holder has a number of ribs contacting the second surface of the brush.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: September 3, 2019
    Assignee: JOHNSON ELECTRIC INTERNATIONAL AG
    Inventors: Wen Liang Li, James Ching Sik Lau, Kwong Yip Poon, Wan You Wang, Ji Dong Chai
  • Publication number: 20190267626
    Abstract: A Li/CFx primary battery having a lithium-based anode and a fluorinated carbon cathode. The fluorinated carbon cathode includes fluorinated carbon nanoparticles. The structure and size distribution of the carbon precursor carbon nanotubes are configured to provide improved battery performance. The fluorinated carbon nanoparticles can be formed by fluorinating carbon nanoparticles using a fluorine-based reactive gas at a temperature in the range from 300 to 600° C., and the fluorinated carbon nanoparticles can further be used to form the cathode of the primary battery. Producing the Li/CFx primary batter can also include heating the fluorinated carbon nanoparticles under an inert atmosphere before the fluorinated carbon nanoparticles are used to form the cathode of the primary battery.
    Type: Application
    Filed: May 10, 2019
    Publication date: August 29, 2019
    Inventors: Hanpu Liang, Nathan Lawrence, Timothy Jones, Steven Gahlings, Christine Jarvis, Wen Rong Li, Rogerio Tadeu Ramos, Vladimir Hernandez Solis
  • Patent number: 10391163
    Abstract: A vaccine composition is disclosed. The vaccine composition comprises: (a) a therapeutically effective amount of an influenza virus-like particle (VLP) comprising: (i) influenza M1, influenza M2, influenza hemagglutinin (HA), and influenza neuraminidase (NA) proteins; (b) Foot-and-mouth disease virus (FMDV) capsid protein VP3, recombinant FMDV VP3 (rVP3), VP3 peptide, or SUMO VP3; and (c) alum. Also disclosed is use of a vaccine composition according to the invention in the manufacture of a medicament for inducing an immunogenic response in a subject in need thereof.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: August 27, 2019
    Assignee: Academia Sinica
    Inventors: Shu-Mei Liang, Pei-Wen Hsiao, Ming-Chu Cheng, Yu-Chih Yang
  • Patent number: 10388749
    Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: August 20, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Liang Wu, Wen-Tsung Chang, Jui-Ming Yang, I-Fan Chang, Chun-Ting Chiang, Chih-Wei Lin, Bo-Yu Su, Chi-Ju Lee
  • Patent number: 10389217
    Abstract: A fluid generating device and an electric apparatus utilizing the fluid generating device are provided. The fluid generating device includes a motor and an impeller driven by the motor. The motor is a single phase direct current brushless motor which includes a stator and a rotor. The stator includes a stator core and a stator winding. The stator core includes an outer ring portion, teeth extending inwardly from the outer ring portion, a pole shoe formed at the tooth. Slot openings are formed between the pole shoes. The rotor is received in a receiving chamber defined by the pole shoes. Inner surfaces of the pole shoes and the rotor form therebetween a substantially even air gap. The presence of even air gap can reduce the cogging torque of the motor, thus reducing the startup current and noise of the motor.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: August 20, 2019
    Assignee: JOHNSON ELECTRIC INTERNATIONAL AG
    Inventors: Yue Li, Kwong Yip Poon, Chui You Zhou, Jie Chai, Wen Liang Li, Lin Ping Gui, Tao Zhang, Qiang Zhou
  • Patent number: 10380968
    Abstract: A method for adjusting the adaptive screen-refresh rate and a device thereof are provided. The method for adjusting the adaptive screen-refresh rate includes the following steps: determining a first screen-refresh rate set by the display source; and based on the first screen-refresh rate, setting a refresh rate used by a displaying module for displaying the picture or frame on a displaying screen periodically.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: August 13, 2019
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Xuecheng Zhang, Xiang Xu, Chin-Wen Liang, Meng-Hsun Wen, Huan-Pu Kan, Cheng-Pin Huang
  • Patent number: 10381254
    Abstract: A wafer debonding and cleaning apparatus comprises a wafer debonding module configured to separate a semiconductor wafer from a carrier wafer. The wafer debonding and cleaning apparatus also comprises a first wafer cleaning module configured perform a first cleaning process to clean a surface of the semiconductor wafer. The wafer debonding and cleaning apparatus further comprises an automatic wafer handling module configured to transfer the semiconductor wafer from one of the wafer debonding module or the first wafer cleaning module to the other of the wafer debonding module or the first wafer cleaning module. The semiconductor wafer has a thickness ranging from about 0.20 ?m to about 3 mm.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 13, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Chih Chiou, Yu-Liang Lin, Hung-Jung Tu
  • Patent number: 10378995
    Abstract: An optical wavefront testing system includes a light source, an image capturing unit and a processing unit. The image capturing unit includes a lens array and a sensor module that is configured to detect light rays passing through an optical element and the lens array. The processing unit controls the sensor module to detect the light rays under a plurality exposure conditions for generating a plurality of images each including a plurality of light spots, obtains a plurality of light spot datasets corresponding to the light spots and each including a plurality of pixel coordinate sets and a plurality of pixel values, and obtains wavefront information associated with the light spots based on the light spot datasets of at least two of the images.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: August 13, 2019
    Assignee: Tonta Electro Optical Co., Ltd.
    Inventors: Chao-Wen Liang, Chin-Chang Liang
  • Patent number: 10366973
    Abstract: A layout modification method for fabricating an integrated circuit is provided. The layout modification method includes calculating uniformity of critical dimension of a patterned layer with a layout for an exposure manufacturing process to produce a semiconductor device. The patterned layer is divided into a first portion and a second portion which is adjacent to the first portion, and a width of the second portion equals to a penumbra size of the exposure manufacturing process. The layout modification method further includes retrieving an adjusting parameter for modifying the layout of the semiconductor device; determining a compensation amount based on the adjusting parameter and the uniformity of critical dimension; and compensating the critical dimension of the second portion of the patterned layer by utilizing the compensation amount to generate a modified layout.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: July 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Wen Cho, Fu-Jye Liang, Chun-Kuang Chen, Chih-Tsung Shih, Li-Jui Chen, Po-Chung Cheng, Chin-Hsiang Lin