Abstract: A method for etching a barrier material on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system, wherein the substrate includes the barrier material and a low-k material, and wherein the barrier material and a low-k material are configured to be exposed to a plasma. The method also includes flowing an etchant gas mixture, including CH3F from about 4% to about 8% of a plasma gas flow, into the plasma processing chamber, wherein the etchant gas mixture is configured to etch the barrier material at a first etch rate, the etchant gas mixture is configured to etch the low-k material at a second etch rate, wherein the first etch rate is substantially greater than the second etch rate. The method further includes striking a plasma from the etchant source gas; and etching the barrier layer and the low-k layer.

Abstract: An in situ dual-stage etch endpoint detection system is disclosed. The system includes an etch chamber, an interferometry endpoint monitoring system, and a non-IEP endpoint monitoring system. The etch chamber includes an electrostatic chuck (ESC), a top electrode, and a bottom electrode. The ESC is designed to support a wafer having a spacer layer formed over a gate structure. The interferometry endpoint (IEP) monitoring system is designed to monitor an interference photon beam reflected by the top of spacer layer and the reflection beam on interface of bottom of spacer during a first etch operation. The non-IEP endpoint monitoring system monitors a second etch operation by monitoring an etch time. A first etch operation implementing the IEP monitoring system is discontinued, leaving a thin spacer layer to be etched during the second etch operation.

Abstract: A method for fabricating a spacer of a gate structure is provided. The method performing a first etch process implementing a first etchant gas. The first etch process is configured to implement an interferometry endpoint (IEP) detection method to detect a removal of a portion of a spacer layer having a specific thickness from over the surface of the substrate, thus leaving a thin spacer layer. The method further includes performing a second etch process for a predetermined period of time implementing a second etchant gas. The second etch process is configured to remove the thin spacer layer, leaving the spacer for the gate structure.

Abstract: A method of cleanly etching an organic polymer layer disposed over a substrate is disclosed. The invention is particularly useful in damascene processing where openings are etched in the organic polymer layer to form interconnects. The method includes lowering the temperature of the substrate. The method also includes flowing H2O vapor over the organic polymer layer and condensing (or freezing) the H2O vapor on the organic polymer layer. The method additionally includes etching through the organic polymer layer and the condensed H2O vapor to form an opening having a side wall. The condensed (or frozen) H2O vapor is arranged to form a passivating film (of ice) along the side wall of the opening to protect the side wall from etching.

Abstract: An apparatus and method in a plasma processing chamber for reducing charging of a wafer is described. A plasma generating element is configured to cause a plasma including ions and free radicals to be formed in a plasma generating region. A plasma diffusion region is configured so that plasma generated in the plasma generating region can diffuse through the plasma diffusion region. A conductive grid is positioned within the plasma diffusion region between the wafer and the plasma generating region. The conductive grid includes a mesh which is configured to trap a portion of the ions so that a portion of the ions are prevented from diffusing through the diffusion region to reach the wafer.