Abstract: Multiple intertwined inductor coils combine to form one or more transformer devices of a semiconductor device. The intertwined inductor coils are formed of only two metallization layers and vias coupling the layers. The inductor coils are vertically oriented and include a magnetic axis parallel to the substrate surface. A plurality of metal wires are provided on both a first device level and a second device level. Each of the metal wires on the first device level is coupled to two wires on the second device level and forms a first inductor coil. The two metal wires on the second device level that form part of the first inductor coil, are separated by a third wire that is coupled to two different first device level metal wires and forms part of a different second inductor coil intertwined with the first inductor coil.

Abstract: MIM capacitors that are temperature and/or voltage independent, and a methodology for formulating the MIM capacitors for use in semiconductor integrated circuits, is provided. Vertical MIM capacitive structures include at least two vertically separated electrodes and a capacitor dielectric that includes portions of different dielectric materials provided in a desired area ratio. The disclosure provided for selecting dielectrics and dielectric thicknesses, determining an area ratio that produces temperature and/or voltage independent MIM capacitors, and forming capacitive devices with the desired area ratio. In one embodiment, the capacitor dielectric includes at least one SiO dielectric portion and at least one SiN dielectric portion and a total capacitive area includes the SiN and SiO dielectric portions arranged such that the ratio of the area of the SiO portions to the area of the SiN portions is about 1.15:1.

Abstract: Multiple intertwined inductor coils combine to form one or more transformer devices of a semiconductor device. The intertwined inductor coils are formed of only two metallization layers and vias coupling the layers. The inductor coils are vertically oriented and include a magnetic axis parallel to the substrate surface. A plurality of metal wires are provided on both a first device level and a second device level. Each of the metal wires on the first device level is coupled to two wires on the second device level and forms a first inductor coil. The two metal wires on the second device level that form part of the first inductor coil, are separated by a third wire that is coupled to two different first device level metal wires and forms part of a different second inductor coil intertwined with the first inductor coil.

Abstract: A split-gate flash cell device and method for forming the same are not provided. The split-gate flash cell device includes a floating gate transistor. The floating gate transistor includes a floating gate and a control gate disposed over at least a portion of the floating gate, along a side of the floating gate and over a portion of the substrate adjacent the floating gate. The control gate includes a portion of SiGe material. In some embodiments, the control gate is a composite material with a lower SiGe layer and an upper material layer. The upper material layer is polysilicon or other suitable materials.

Abstract: MIM capacitors that are temperature and/or voltage independent, and a methodology for formulating the MIM capacitors for use in semiconductor integrated circuits, is provided. Vertical MIM capacitive structures include at least two vertically separated electrodes and a capacitor dielectric that includes portions of different dielectric materials provided in a desired area ratio. The disclosure provided for selecting dielectrics and dielectric thicknesses, determining an area ratio that produces temperature and/or voltage independent MIM capacitors, and forming capacitive devices with the desired area ratio. In one embodiment, the capacitor dielectric includes at least one SiO dielectric portion and at least one SiN dielectric portion and a total capacitive area includes the SiN and SiO dielectric portions arranged such that the ratio of the area of the SiO portions to the area of the SiN portions is about 1.15:1.

Abstract: The present invention provides an electric bike with capability of self-charging. The electric bike is fixedly supported by supporting legs so as to be operated in a stationary point. A user steps on a petal assembly of the electric bike to drive a wheel to rotate. The electric bike further includes a power-generating device, a controller, a battery and a damper. The controller is used to receive a power source outputted by the power-generating device and convert the power source into a plurality of DC power sources to charge the battery. The damper consumes a portion of electricity generated by the power-generating device. With the above arrangement, the electric bike can be charged by itself while the user is exercising.

Abstract: An exercise apparatus includes an exercise machine and a media device. The exercise machine includes an exercise device and a controller. The exercise device generates an electrical output through an exercise mechanism that drives operation of a power generating unit. The controller includes a status data generating unit for receiving the electrical output and generating exercise status data based on the electrical output, a control unit storing user-configured data and the exercise status data, and a resistance controlling unit controlled by the control unit for causing the exercise status data to conform with the user-configured data. The control unit and the media device are configured to operate according to a personal computer compatible protocol. The user-configured data is established and configured through the media device. The exercise status data is stored in or displayed by the media device.

Abstract: A motor control device for controlling rotation of a brushless DC motor of a ceiling fan includes a receiver unit that receives an input signal and outputs a command signal, a magnetic sensor unit for detecting a magnetic pole variation of the brushless DC motor so as to generate a position signal, a processing unit that is electrically connected to the receiver unit and the magnetic sensor unit and that generates a control signal, a motor drive unit that is electrically connected to the processing unit and the brushless DC motor and that generates a drive signal for driving the brushless DC motor, an AC to DC converter unit that rectifies and filters a grid power to generate a first DC power for the motor drive unit, and a DC to DC converter unit that is electrically connected to the aforementioned units and that generates a second DC power.

Abstract: The present invention provides an electric bike with capability of self-charging. The electric bike is fixedly supported by supporting legs so as to be operated in a stationary point. A user steps on a petal assembly of the electric bike to drive a wheel to rotate. The electric bike further includes a power-generating device, a controller, a battery and a damper. The controller is used to receive a power source outputted by the power-generating device and convert the power source into a plurality of DC power sources to charge the battery. The damper consumes a portion of electricity generated by the power-generating device. With the above arrangement, the electric bike can be charged by itself while the user is exercising.

Abstract: An exercise device capable of generating electricity includes a generator unit, a power conversion unit, a controller unit, a power resistor unit, a human machine interface (HMI) unit and an energy conversion unit. The power conversion unit is electrically connected to the generator unit for receiving an AC power source outputted by the generator and converting it into a plurality of DC power sources. With stepping on the exercise device by external manpower to drive the generator unit to operate, the energy conversion unit is used to store the energy. Further, in the beginning of the operation of the exercise device, the energy conversion unit provides the HMI unit with necessary electricity. After the exercise device achieves a certain rotating speed, the power conversion unit is switched to provide the HMI unit with necessary electricity. With the above arrangement, the exercise device can be driven by an external force to generate electricity.

Abstract: A flash memory includes substrate, control gates, trenches, source regions, isolation structures, drain regions, a common source line, floating gates, tunneling dielectric layers, and dielectric layer. The control gates and the trenches are in first and second directions on the substrate, respectively. The source regions are in the substrate and trenches on one side of control gates. The isolation structures fill the trenches between the source regions. The drain regions are in the substrate on the other side of control gates between the isolation structures. The common source line is in the second direction inside the substrate and electrically connected to the source regions. Furthermore, the floating gates are between the control gates and the substrate that between the source and drain regions. The tunneling dielectric layers are disposed between the floating gates and the substrate, and the dielectric layer is disposed between the floating and control gates.

Abstract: A flash memory includes substrate, control gates, trenches, source regions, isolation structures, drain regions, a common source line, floating gates, tunneling dielectric layers, and dielectric layer. The control gates and the trenches are in first and second directions on the substrate, respectively. The source regions are in the substrate and trenches on one side of control gates. The isolation structures fill the trenches between the source regions. The drain regions are in the substrate on the other side of control gates between the isolation structures. The common source line is in the second direction inside the substrate and electrically connected to the source regions. Furthermore, the floating gates are between the control gates and the substrate that between the source and drain regions. The tunneling dielectric layers are disposed between the floating gates and the substrate, and the dielectric layer is disposed between the floating and control gates.

Abstract: A wireless communication device has a wireless transceiver module, a calculation module and a display module. The wireless transceiver module transmits and receives wireless data. The calculation module retrieves and processes the wireless data for generating display instructions. The display module shows communication status of the wireless communication device according to the display instructions. With information regarding the communication status, users are able to know the instant status of the wireless communication device.

Abstract: A method for fabricating a mask read-only-memory with diode cells is provided. A doped conductive layer with a first conductivity is formed on bit lines. Then, a photoresist layer with a mask ROM pattern is formed on an interlayer dielectric layer on the doped conductive layer for serving as an etching mask, thereby forming openings in the interlayer dielectric layer unto the exposed regions of the doped conductive layer. Performing ion implantation to form a diffusion region with a second conductivity opposite to the first conductivity in each exposed region of the doped conductive layer, so that the doped conductive layer and the diffusion regions formed therein constitute diode cells that are served as memory cells. A contact plug is formed in each opening unto the diode cell and a conductive layer is formed on the contact plug for serving as word lines.

Abstract: A planarization method using anisotropic etching can be applied to planarize an insulating layer with an uneven surface on a substrate. H2SO4, H3PO4, HF and H2O are mixed to form an etching solution. The substrate is placed into the etching solution to make the etching solution pass the surface of the insulating layer at a flow rate to etch the insulating layer. After a period of etching time, the insulating layer with a more planar surface can be obtained.

Abstract: A polysilicon self-alignment contact and a polysilicon common source line. A cell array formed on a semiconductor substrate has a second cell adjacent to a first cell in a Y-axis orientation, and a third cell adjacent to the first cell in an X-axis orientation. Each cell comprises a first gate structure and a second gate structure, a source region formed in the semiconductor substrate adjacent to the first gate structure and the second gate structure, and an opening formed between the first gate structure and the second gate structure to expose the source region. A drain region is formed in the semiconductor substrate adjacent to the second gate structure of the first cell and the first gate structure of the second cell. A contact hole is formed between the first cell and the second cell to expose the drain region. A polysilicon layer is formed in the contact hole to serve as a polysilicon self-aligned contact.

Abstract: A planarization method using anisotropic etching can be applied to planarize an insulating layer with an uneven surface on a substrate. H2SO4, H3PO4, HF and H2O are mixed to form an etching solution. The substrate is placed into the etching solution to make the etching solution pass the surface of the insulating layer at a flow rate to etch the insulating layer. After a period of etching time, the insulating layer with a more planar surface can be obtained.

Abstract: A process for fabricating a sharp corner-free shallow trench isolation structure. First, a SiON layer and a mask layer are successively formed on a semiconductor substrate. The SiON layer and mask layer are patterned to form an opening, exposing the substrate region on which a shallow trench isolation region will be formed. Next, an oxide spacer is formed on sidewalls of the SiON layer and mask layer. A trench is formed in the semiconductor substrate using the spacer and mask layer as a mask. Next, a liner oxide layer is formed on the surface of the trench by thermal oxidation, such that the liner oxide layer near the SiON layer is in a bird's beak form. An isolating oxide layer is filled in the trench. Finally, the mask layer and SiON layer are removed. The present invention forms a short and thick bird's beak structure and rounded trench corner. Therefore, the thickness of the tunnel oxide is even and the tunnel oxide integrity remains.