Patents by Inventor Wen-Chang Lee
Wen-Chang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8896386Abstract: A calibration device arranged for calibrating an oscillating frequency of an oscillator includes: a phase locking device arranged to track a first reference clock generated by the oscillator until a feedback clock is phase-aligned with the first reference clock, and then arranged to track a second reference clock generated by the oscillator until a phase difference between the second reference clock and the feedback clock is a static phase difference, wherein the feedback clock is generated by dividing an output oscillating signal of the phase locking device by a divisor; an adjusting circuit arranged to adjust the divisor into an updated divisor to reduce the static phase difference between the second reference clock and the feedback clock; and a calibrating circuit arranged to calibrate the oscillating frequency of the oscillator according to the updated divisor, wherein the second reference clock is generated by varying a control signal of the oscillator.Type: GrantFiled: March 6, 2013Date of Patent: November 25, 2014Assignee: MediaTek Singapore Pte. Ltd.Inventors: Wen-Chang Lee, Ping-Ying Wang
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Patent number: 8570107Abstract: A clock generating apparatus includes: a time-to-digital converter (TDC) arranged to convert a timing difference between a reference clock and a variable clock to generate a digital value; a calibrating device arranged to generate a control signal according to the digital value and the reference clock; a controllable oscillator arranged to generate an oscillating signal according to the control signal and the digital value; and a feedback device arranged to generate the variable clock to the TDC according to the oscillating signal, and the calibrating device calibrates the controllable oscillator to make the oscillating signal have a target oscillating frequency.Type: GrantFiled: November 17, 2011Date of Patent: October 29, 2013Assignee: MediaTek Singapore Pte. Ltd.Inventors: Xiaochuan Guo, Wen-Chang Lee, Chii-Horng Chen, Augusto Marques
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Publication number: 20130265114Abstract: A method for measuring mismatches in a digitally-controlled oscillator (DCO) includes: in a first settling phase, controlling a first capacitor array of the DCO to have a first capacitive value consistently, and controlling a second capacitor array of the DCO in a closed loop to make a frequency of the DCO locked to a target value; in a second settling phase, controlling the first capacitor array to consistently have a second capacitive value different from the first capacitive value, and controlling the second capacitor array in the closed loop to make the frequency of the DCO locked to the target value; and deriving an estimation from a difference value between a first characteristic value and a second characteristic value, wherein the first and second characteristic values are derived from the digital control word; and estimating the mismatches according to at least the estimation value.Type: ApplicationFiled: March 11, 2013Publication date: October 10, 2013Applicant: MEDIATEK SINGAPORE PTE. LTD.Inventors: Wen-Chang Lee, Shih-Chi Shen, Chii-Horng Chen, Xiaochuan Guo
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Publication number: 20130234800Abstract: A calibration device arranged for calibrating an oscillating frequency of an oscillator includes: a phase locking device arranged to track a first reference clock generated by the oscillator until a feedback clock is phase-aligned with the first reference clock, and then arranged to track a second reference clock generated by the oscillator until a phase difference between the second reference clock and the feedback clock is a static phase difference, wherein the feedback clock is generated by dividing an output oscillating signal of the phase locking device by a divisor; an adjusting circuit arranged to adjust the divisor into an updated divisor to reduce the static phase difference between the second reference clock and the feedback clock; and a calibrating circuit arranged to calibrate the oscillating frequency of the oscillator according to the updated divisor, wherein the second reference clock is generated by varying a control signal of the oscillator.Type: ApplicationFiled: March 6, 2013Publication date: September 12, 2013Applicant: MEDIATEK SINGAPORE PTE. LTD.Inventors: Wen-Chang Lee, Ping-Ying Wang
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Patent number: 8519801Abstract: A digitally controlled oscillator is provided. The digitally controlled oscillator includes a pair of transistors cross-coupled to each other, a switched capacitor array coupled to the pair of transistors and a plurality of frequency tracking units coupled to the pair of transistors. The pair of transistors provides an output signal. The switched capacitor array tunes a frequency of the output signal. The frequency tracking units tune the frequency of the output signal to a target frequency. At least one of the frequency tracking units is capable of selectively providing a first capacitance and a second capacitance. A tuning resolution of the frequency tracking unit is determined by a difference between the first and second capacitances.Type: GrantFiled: August 15, 2011Date of Patent: August 27, 2013Assignee: Mediatek Singapore Pte. Ltd.Inventors: Yen-Horng Chen, Wen-Chang Lee, Augusto Marques, Xiaochuan Guo
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Publication number: 20130043958Abstract: A digitally controlled oscillator is provided. The digitally controlled oscillator includes a pair of transistors cross-coupled to each other, a switched capacitor array coupled to the pair of transistors and a plurality of frequency tracking units coupled to the pair of transistors. The pair of transistors provides an output signal. The switched capacitor array tunes a frequency of the output signal. The frequency tracking units tune the frequency of the output signal to a target frequency. At least one of the frequency tracking units is capable of selectively providing a first capacitance and a second capacitance. A tuning resolution of the frequency tracking unit is determined by a difference between the first and second capacitances.Type: ApplicationFiled: August 15, 2011Publication date: February 21, 2013Applicant: MEDIATEK SINGAPORE PTE. LTD.Inventors: Yen-Horng Chen, Wen-Chang Lee, Augusto Marques, Xiaochuan Guo
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Patent number: 8345450Abstract: The configurations of a DC/DC resonant converter and a controlling method thereof are provided. The proposed converter includes an over-current protection apparatus including a first switch element having a first and a second terminals, and a first voltage element having a negative terminal coupled to a positive terminal of a DC input voltage source and a positive terminal coupled to the second terminal of the first switch element.Type: GrantFiled: August 11, 2010Date of Patent: January 1, 2013Assignee: Delta Electronics, Inc.Inventors: Chao Yan, Jianhong Zeng, Wenxin Zhang, Yiqing Ye, Jianping Ying, Peter Barbosa, Wen-Chang Lee
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Publication number: 20120249195Abstract: A clock generating apparatus includes: a time-to-digital converter (TDC) arranged to convert a timing difference between a reference clock and a variable clock to generate a digital value; a calibrating device arranged to generate a control signal according to the digital value and the reference clock; a controllable oscillator arranged to generate an oscillating signal according to the control signal and the digital value; and a feedback device arranged to generate the variable clock to the TDC according to the oscillating signal, and the calibrating device calibrates the controllable oscillator to make the oscillating signal have a target oscillating frequency.Type: ApplicationFiled: November 17, 2011Publication date: October 4, 2012Inventors: Xiaochuan Guo, Wen-Chang Lee, Chii-Horng Chen, Augusto Marques
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Publication number: 20120154073Abstract: A tunable inductor includes a main wiring and at least one tuning module. The main wiring is arranged to encircle an inductor area of the tunable inductor. In addition, the tuning module is arranged to couple associated nodes of the main wiring. For example, each tuning module of the at least one tuning module includes a first switch positioned within the inductor area, and further includes at least one auxiliary wiring. When the first switch is turned on, the tuning module couples two nodes of the main wiring, where the at least one auxiliary wiring is arranged to couple the two nodes when the first switch is turned on. In particular, a patterned ground plane is arranged to decrease the energy loss of the tunable inductor, and more particularly, to prevent the tunable inductor from suffering energy loss. The patterned ground plane includes some conductive sections forming a W-like shape.Type: ApplicationFiled: July 14, 2011Publication date: June 21, 2012Inventors: Wen-Chang Lee, Yen-Horng Chen, Augusto Marques
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Patent number: 8140041Abstract: One exemplary tunable capacitive device includes a first tunable capacitive element, a first coupling capacitive element, a first coupling resistive element, and a first specific capacitive element. The first tunable capacitive element has a first node coupled to a first input voltage, and a second node. The first coupling capacitive element has a first node coupled to the second node of the first tunable capacitive element, and a second node coupled to a first connection terminal of the tunable capacitive device. The first coupling resistive element has a first node coupled to the second node of the first tunable capacitive element, and a second node coupled to a second input voltage, where the first input voltage and the second input voltage include a control voltage and a reference voltage. The first specific capacitive element is coupled between the first node and the second node of the first tunable capacitive element.Type: GrantFiled: August 27, 2009Date of Patent: March 20, 2012Assignee: Mediatek Inc.Inventor: Wen-Chang Lee
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Patent number: 8035940Abstract: An over-voltage protection circuit structure for protecting a high power translation circuit is provided. The over-voltage protection circuit structure receives an alternating current input and comprises a relay circuit, a voltage detection module, and an energy supply circuit. The relay circuit relays the alternating current input to the high power translation circuit. The energy supply circuit provides power to the voltage detection module in response to the alternating current input. The voltage detection module detects a voltage value of the alternating current input continuously. When the voltage value is greater than or equal to a first reference value, the voltage detection module generates an over-voltage signal. The relay circuit opens to cease delivering the alternating current input into the high power circuit in response to the over-voltage signal, thus the purpose of protecting the high power circuit is achieved.Type: GrantFiled: May 23, 2008Date of Patent: October 11, 2011Assignee: Delta Electronics, Inc.Inventor: Wen-Chang Lee
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Publication number: 20110133308Abstract: A semiconductor device includes a substrate; an inductor wiring pattern overlying the substrate, wherein the inductor wiring pattern is formed in an inductor-forming region; a plurality of shielding patterns between the inductor wiring pattern and the substrate within the inductor-forming region; and at least one first oxide define (OD) pattern disposed in the substrate or between the inductor wiring pattern and the substrate.Type: ApplicationFiled: February 16, 2011Publication date: June 9, 2011Inventors: Kuei-Ti Chan, Tung-Hsing Lee, Augusto Marques, Wen-Chang Lee
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Publication number: 20110051311Abstract: One exemplary tunable capacitive device includes a first tunable capacitive element, a first coupling capacitive element, a first coupling resistive element, and a first specific capacitive element. The first tunable capacitive element has a first node coupled to a first input voltage, and a second node. The first coupling capacitive element has a first node coupled to the second node of the first tunable capacitive element, and a second node coupled to a first connection terminal of the tunable capacitive device. The first coupling resistive element has a first node coupled to the second node of the first tunable capacitive element, and a second node coupled to a second input voltage, where the first input voltage and the second input voltage include a control voltage and a reference voltage. The first specific capacitive element is coupled between the first node and the second node of the first tunable capacitive element.Type: ApplicationFiled: August 27, 2009Publication date: March 3, 2011Inventor: Wen-Chang Lee
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Publication number: 20110038181Abstract: The configurations of a DC/DC resonant converter and a controlling method thereof are provided. The proposed converter includes an over-current protection apparatus including a first switch element having a first and a second terminals, and a first voltage element having a negative terminal coupled to a positive terminal of a DC input voltage source and a positive terminal coupled to the second terminal of the first switch element.Type: ApplicationFiled: August 11, 2010Publication date: February 17, 2011Applicant: DELTA ELECTRONICS, INC.Inventors: Chao Yan, Jianhong Zeng, Wenxin Zhang, Yiqing Ye, Jianping Ying, Peter Barbosa, Wen-Chang Lee
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Publication number: 20090180229Abstract: An over-voltage protection circuit structure for protecting a high power translation circuit is provided. The over-voltage protection circuit structure receives an alternating current input and comprises a relay circuit, a voltage detection module, and an energy supply circuit. The relay circuit relays the alternating current input to the high power translation circuit. The energy supply circuit provides power to the voltage detection module in response to the alternating current input. The voltage detection module detects a voltage value of the alternating current input continuously. When the voltage value is greater than or equal to a first reference value, the voltage detection module generates an over-voltage signal. The relay circuit opens to cease delivering the alternating current input into the high power circuit in response to the over-voltage signal, thus the purpose of protecting the high power circuit is achieved.Type: ApplicationFiled: May 23, 2008Publication date: July 16, 2009Inventor: WEN-CHANG LEE
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Patent number: 7446609Abstract: A variable gain amplifier includes an amplifying circuit and a gain adjusting circuit including the following circuits. A linear exponential transforming circuit transforms a linear controlling signal to output an exponential controlling signal. A voltage buffer circuit is coupled with the linear exponential transforming circuit to receive the exponential controlling signal, outputs a feedback signal to a power transforming circuit, and outputs a voltage controlling signal to control a gain of the amplifying circuit according to the exponential controlling signal and a bias current. A power transforming circuit is coupled with the linear exponential transforming circuit and the voltage buffer circuit to receive the exponential controlling signal and the feedback signal and take two times of a square root of a product of the exponential controlling signal and the feedback signal plus the bias current to output a power signal to the linear exponential transforming circuit.Type: GrantFiled: February 2, 2007Date of Patent: November 4, 2008Assignee: Via Technologies, Inc.Inventors: Wen-Chang Lee, Ying-Che Tseng
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Publication number: 20070262818Abstract: A variable gain amplifier includes an amplifying circuit and a gain adjusting circuit including the following circuits. A linear exponential transforming circuit transforms a linear controlling signal to output an exponential controlling signal. A voltage buffer circuit is coupled with the linear exponential transforming circuit to receive the exponential controlling signal, outputs a feedback signal to a power transforming circuit, and outputs a voltage controlling signal to control a gain of the amplifying circuit according to the exponential controlling signal and a bias current. A power transforming circuit is coupled with the linear exponential transforming circuit and the voltage buffer circuit to receive the exponential controlling signal and the feedback signal and take two times of a square root of a product of the exponential controlling signal and the feedback signal plus the bias current to output a power signal to the linear exponential transforming circuit.Type: ApplicationFiled: February 2, 2007Publication date: November 15, 2007Inventors: Wen-Chang Lee, Ying-Che Tseng
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Publication number: 20060148421Abstract: A method and an apparatus for shifting a resonance frequency in response to an operating frequency are provided. The present invention retrieves a control signal, from a frequency synthesizer, indicative of a difference between the operating frequency and a predetermined frequency, decodes the control signal to generate a tuning signal by looking up a mapping table, and tunes the resonance frequency in response to the tuning signal.Type: ApplicationFiled: January 4, 2005Publication date: July 6, 2006Inventors: Patrick Huang, Wen-Chang Lee, Sen-You Liu