Abstract: A display system suitable for a vehicle is provided. The display system suitable for the vehicle includes a center console, a processing device, and a display device. The center console is configured to generate a power sequence according to a customization setting, and the power sequence corresponds to content of a data table. The processing device is configured to receive the power sequence and decodes the power sequence through a lookup table to generate a decoding result. The lookup table includes the content of the data table. The display device is coupled to the processing device and is configured to display a display image according to the decoding result.

Abstract: Methods, systems, and devices for wireless communication are described. A wireless device may transmit a first calibration packet at a first power level. The wireless device may determine a power measurement corresponding to the first calibration packet based at least in part on feedback associated with a transmit power output of the first calibration packet. The wireless device may compare the power measurement corresponding to the first calibration packet to a target power level associated with the first power level. Additionally, the wireless device may adjust one or more gain parameters associated with the first power level based at least in part on the comparing.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously process GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously process GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously process GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: A receiver for receiving both GPS signals and GLONASS signals is provided. This receiver includes an analog front end (AFE), a GPS digital front end (DFE) and a GLONASS DFE for receiving an output of the AFE, and a dual mode interface (DMI) for receiving outputs of the GPS and GLONASS DFEs. Search engines are provided for receiving outputs of the DMI. Notably, certain front-end components of the AFE are configured to process both the GPS signals and the GLONASS signals.

Abstract: A receiver for receiving both GPS signals and GLONASS signals is provided. This receiver includes an analog front end (AFE), a GPS digital front end (DFE) and a GLONASS DFE for receiving an output of the AFE, and a dual mode interface (DMI) for receiving outputs of the GPS and GLONASS DFEs. Search engines are provided for receiving outputs of the DMI. Notably, certain front-end components of the AFE are configured to process both the GPS signals and the GLONASS signals.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously process GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously processes GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: A satellite navigation receiver having a flexible acquisition and tracking engine architecture. The flexible acquisition engine has a reconfigurable delay line that can be used either as a single entity or divided into different sections. Consequently, it can be configured to search different satellite vehicles, a single Doppler frequency, and full CA code in parallel. When configuring the delay line into different sections, each section is used to search a partial CA code. In this configuration, multiple Doppler mode, multiple satellite vehicles, multiple Doppler frequencies, and partial CA code can be searched in parallel. Furthermore, the different sections of the CA code can be time-multiplexed into a correlator, which can then be over clocked to achieve full CA code correlation. The flexible tracking engine includes a number of parallel tracking channels, whereby each individual channel has a number of taps or fingers, which can be used to lock onto different delays.

Abstract: A receiver for receiving both GPS signals and GLONASS signals is provided. This receiver includes an analog front end (AFE), a GPS digital front end (DFE) and a GLONASS DFE for receiving an output of the AFE, and a dual mode interface (DMI) for receiving outputs of the GPS and GLONASS DFEs. Search engines are provided for receiving outputs of the DMI. Notably, certain front-end components of the AFE are configured to process both the GPS signals and the GLONASS signals.

Abstract: A satellite navigation receiver having a flexible acquisition and tracking engine architecture. The flexible acquisition engine has a reconfigurable delay line that can be used either as a single entity or divided into different sections. Consequently, it can be configured to search different satellite vehicles, a single Doppler frequency, and full CA code in parallel. When configuring the delay line into different sections, each section is used to search a partial CA code. In this configuration, multiple Doppler mode, multiple satellite vehicles, multiple Doppler frequencies, and partial CA code can be searched in parallel. Furthermore, the different sections of the CA code can be time-multiplexed into a correlator, which can then be over clocked to achieve full CA code correlation. The flexible tracking engine includes a number of parallel tracking channels, whereby each individual channel has a number of taps or fingers, which can be used to lock onto different delays.

Abstract: A satellite navigation receiver having a flexible acquisition and tracking engine architecture. The flexible acquisition engine has a reconfigurable delay line that can be used either as a single entity or divided into different sections. Consequently, it can be configured to search different satellite vehicles, a single Doppler frequency, and full CA code in parallel. When configuring the delay line into different sections, each section is used to search a partial CA code. In this configuration, multiple Doppler mode, multiple satellite vehicles, multiple Doppler frequencies, and partial CA code can be searched in parallel. Furthermore, the different sections of the CA code can be time-multiplexed into a correlator, which can then be over clocked to achieve full CA code correlation. The flexible tracking engine includes a number of parallel tracking channels, whereby each individual channel has a number of taps or fingers, which can be used to lock onto different delays.

Abstract: A satellite navigation receiver having a flexible acquisition and tracking engine architecture. The flexible acquisition engine has a reconfigurable delay line that can be used either as a single entity or divided into different sections. Consequently, it can be configured to search different satellite vehicles, a single Doppler frequency, and full CA code in parallel. When configuring the delay line into different sections, each section is used to search a partial CA code. In this configuration, multiple Doppler mode, multiple satellite vehicles, multiple Doppler frequencies, and partial CA code can be searched in parallel. Furthermore, the different sections of the CA code can be time-multiplexed into a correlator, which can then be over clocked to achieve full CA code correlation. The flexible tracking engine includes a number of parallel tracking channels, whereby each individual channel has a number of taps or fingers, which can be used to lock onto different delays.

Abstract: A high sensitivity GPS receiver includes an acquisition engine and a tracking engine. The acquisition engine processes GPS satellite data at data rate that is substantially equal to twice the coarse acquisition (CA) code chip rate. This data rate advantageously enables the acquisition engine to process GPS satellite data with relatively less hardware area than traditional GPS acquisition approaches. In one embodiment, the high efficiency acquisition engine may be over-clocked, thereby allowing different phases of a CA code to be correlated quickly. The tracking engine can advantageously processes GPS satellite data at a data rate that does not have an integer relationship to the CA code chip rate.

Abstract: The present invention provides a simple method for forming the poly-Si and single crystalline Si TFT, which includes forming a line peninsular layer extending from an a-Si island layer at the active region. Then, a laser annealing process is performed, so that the re-crystallization will occur starting from an end of the line peninsular layer and then form the silicon island layer, serving as the active region for the TFT.

Abstract: The invention is directed to method for fabricating a TFT. A semiconductor film is formed over a substrate. A semiconductor island is formed by patterning the semiconductor film. An insulating film is formed over the substrate. An optical annealing process is performed to crystallize the semiconductor island. A transistor is formed on the semiconductor island. Also, a patterning method on an amorphous semiconductor film uses a light beam to illuminate through a mask onto the amorphous semiconductor film, so as to crystallize a portion of the amorphous semiconductor film into a crystal semiconductor portion, or form an oxide on the amorphous semiconductor island in an oxygen ambience. Then, a gas etching process, such as H atoms, is performed to remove a portion of the amorphous semiconductor not being illuminated by the laser.

Abstract: A method for fabricating polycrystalline silicon film on a substrate adds a semitransparent film between the substrate and the silicon film. When the laser irradiates the silicon film, the semitransparent film absorbs a portion of the laser energy, and the semitransparent film is kept at a high temperature during solidification of the silicon film. The silicon film will be kept in a molten state for a long time. Therefore, more time is available for crystal grain growth. The crystal grain size of the polycrystalline silicon film in this method is much larger than the size in normal substrate heating methods.

Abstract: The present invention provides a simple method for forming the poly-Si and single crystalline Si TFT, which includes forming a line peninsular layer extending from an a-Si island layer at the active region. Then, a laser annealing process is performed, so that the re-crystallization will occur starting from an end of the line peninsular layer and then form the silicon island layer, serving as the active region for the TFT.

Abstract: A method for fabricating polycrystalline silicon film is to add a semitransparent film between a substrate and silicon film. When using the laser to light to the silicon film, the semitransparent film absorbs a portion of laser energy and thus the semitransparent film keeps in high temperature during solidification of silicon film. The silicon film will keep molten for a long time and therefore have more time for crystal grain growth. The crystal grain size of polycrystalline silicon film in this method is much larger than normal substrate heating method.