Abstract: An adjustable slurry dispensing device for use with a chemical mechanical polishing apparatus is disclosed. The slurry arm is pivotally connected to the polishing apparatus and has a slurry delivery assembly that is translatable along the length of the arm. This combination of adjustments allows the user to deposit polishing slurry at a desired location on the polishing pad of the polishing apparatus. The dispensing device may be motorized, in which case the slurry arm may be automatically pivotable and the slurry delivery assembly may be automatically translatable along the slurry arm. The motors may be controlled by a computer, or they may be manually adjusted by the user. A method of using the apparatus is also disclosed.

Abstract: Within a method for forming a microelectronic fabrication there is provided a substrate having formed thereover a patterned dielectric layer which defines a via. There is also formed within a lower portion of the via a tungsten stud layer having a recess thereabove within the via. There is also formed within the recess a patterned conductor capping layer formed of a conductor material other than tungsten. The patterned conductor capping layer may seal a void formed within the tungsten stud layer.

Abstract: A method for achieving a predetermined electrical resistance of a semiconductor device metal line in a CMP process including providing a semiconductor process wafer comprising at least one dielectric layer for etching an opening through a thickness of the at least one dielectric layer; measuring a thickness of the at least one dielectric layer prior to etching the opening; etching the opening through a thickness of the at least one dielectric layer; measuring at least one dimension of the opening from which at least an opening depth is determined; forming a metal layer to fill the opening; and, performing a chemical mechanical polish (CMP) process to remove at least the metal layer overlying the opening level to form a metal filled opening according to a projected metal filled opening electrical resistance.

Abstract: Within a method for forming a microelectronic fabrication there is provided a substrate having formed thereover a patterned dielectric layer which defines a via. There is also formed within a lower portion of the via a tungsten.stud layer having a recess thereabove within the via. There is also formed within the recess a patterned conductor capping layer formed of a conductor material other than tungsten. The patterned conductor capping layer may seal a void formed within the tungsten stud layer.

Abstract: A method is disclosed for forming an aluminum bump on an integrated circuit (IC) chip without leaving any metal residue on the passivation layer of the chip. This is accomplished by planarizing the passivation layer with spin-on-glass (SOG) and then forming a PECVD oxide as a sacrificial layer over the SOG, and etching through these layers to form an opening over a metal pad underlying the passivation layer. Then, a layer of aluminum is deposited over the substrate, including the opening, to form an aluminum bump. Aluminum bump is next formed by etching through a patterned oxide which acts as a hard mask over the aluminum layer. The SOG is then removed leaving the passivation layer free of any aluminum residue.