Abstract: A method for performing access management of a memory device with aid of serial number assignment timing control and associated apparatus are provided. The method includes: managing a plurality of spare blocks with a spare pool; popping a first block from the spare pool to be a host data block, and performing first subsequent operations, wherein the host data block is arranged to receive data from a host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block; and popping a second block from the spare pool to be a garbage collection (GC) destination block, and performing second subsequent operations, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block.

Abstract: A method of a flash memory controller used to be externally coupled to a host device and a flash memory, comprising: providing a multi-processor having a plurality of processing units; receiving a trim command and a logical block address (LBA) range sent from the host device; separating multiple operations of the trim command into N threads according to at least one of a number of the processing units, types of the multiple operations, numbers of execution cycles of the multiple operations, and portions of the LBA range; using the processing units to execute the N threads individually; and maximizing a number of execution cycles during which the processing units are busy.

Abstract: A method for performing access management of a memory device with aid of serial number assignment timing control and associated apparatus are provided. The method includes: managing a plurality of spare blocks with a spare pool; popping a first block from the spare pool to be a host data block, and performing first subsequent operations, wherein the host data block is arranged to receive data from a host device, and serial number assignment of the host data block corresponds to a timing of fully programing the host data block; and popping a second block from the spare pool to be a garbage collection (GC) destination block, and performing second subsequent operations, wherein the GC destination block is arranged to receive data from a GC source block during a GC procedure, and serial number assignment of the GC destination block corresponds to a timing of starting using the GC destination block.

Abstract: A method of a flash memory controller used to be externally coupled to a host device and a flash memory, comprising: providing a multi-processor having a plurality of processing units; receiving a trim command and a logical block address (LBA) range sent from the host device; separating multiple operations of the trim command into N threads according to at least one of a number of the processing units, types of the multiple operations, numbers of execution cycles of the multiple operations, and portions of the LBA range; using the processing units to execute the N threads individually; and maximizing a number of execution cycles during which the processing units are busy.

Abstract: A storage device receiving an external instruction from a host includes a plurality of flash memory spaces and a controller. The controller receives the external instruction, queues the external instruction in a first command queue, translates the external instruction into a plurality of operation commands, and sequentially executes the operation commands to respectively operate the flash memory spaces. The controller further gives an identity code to at least one specific operation command to track the execution result of the specific operation command.

Abstract: The method for maintaining a storage mapping table is introduced. After a total number of logical blocks, which exceeds a specified number, have been programmed into a storage unit, an access interface is directed to program a corresponding group of a storage mapping table of a DRAM (Dynamic Random Access Memory) into a first block of the storage unit according to a group number of an unsaved group queue. A group mapping table of the DRAM is updated to indicate that the latest data of the group of the storage mapping table is stored in which location in the storage unit. The group number is removed from the unsaved group queue.

Abstract: The method for maintaining a storage mapping table is introduced. After a total number of logical blocks, which exceeds a specified number, have been programed into a storage unit, an access interface is directed to program a corresponding group of a storage mapping table of a DRAM (Dynamic Random Access Memory) into a first block of the storage unit according to a group number of an unsaved group queue. A group mapping table of the DRAM is updated to indicate that the latest data of the group of the storage mapping table is stored in which location in the storage unit. The group number is removed from the unsaved group queue.