Abstract: A system including a binarization module, a prediction module, and a shifting module. The encoding module is configured to encode symbols using context-adaptive binary arithmetic coding, in which the symbols are generated by binarizing a syntax element. The prediction module is configured to generate a prediction for a number of renormalizations to be performed to renormalize an interval range when encoding one of the symbols. The shifting module is configured to generate a renormalized interval range by shifting the binarized syntax element R times, where R is a number of leading zeros before a 1 in the binarized syntax element. The encoding module is configured to encode a next symbol following the one of the symbols based on the renormalized interval range.

Abstract: A pre-fetch controller for pre-fetching data from a memory and providing data to a logic operation unit is disclosed. The pre-fetch controller includes a register for storing a counter value and a controller connected to the register for changing the counter value when a pre-fetching is activated and for changing the counter value when a cache hit occurs.

Abstract: A system including a binarization module, an encoding module, and a prediction module. The binarization module is configured to binarize a syntax element and to generate symbols. The encoding module is configured to encode the symbols using context-adaptive binary arithmetic coding (CABAC). The prediction module is configured to generate a prediction for a number of renormalizations to be performed to renormalize an interval range when encoding one of the symbols. The encoding module encodes a next symbol following the one of the symbols based on the prediction before renormalization of the interval range is actually completed.

Abstract: A pre-fetch controller for pre-fetching data from a memory and providing data to a logic operation unit is disclosed. The pre-fetch controller includes a register for storing a counter value and a controller connected to the register for changing the counter value when a pre-fetching is activated and for changing the counter value when a cache hit occurs.

Abstract: The present invention provides a pre-fetch controller and a method thereof for efficiently pre-fetching data from a memory device. The method includes initializing a counter value; fetching a data from the memory and subtracting the counter value by a first value when a pre-fetching is activated; adding a second value to the counter value when a cache hit occurs; comparing the counter value with a first threshold value; and when the counter value is smaller than the first threshold value, stopping pre-fetching the data from the memory.

Abstract: The present invention provides a pre-fetch controller and a method thereof for efficiently pre-fetching data from a memory device. The method includes initializing a counter value; fetching a data from the memory and subtracting the counter value by a first value when a pre-fetching is activated; adding a second value to the counter value when a cache hit occurs; comparing the counter value with a first threshold value; and when the counter value is smaller than the first threshold value, stopping pre-fetching the data from the memory.