Abstract: An antenna structure includes a first substrate and a second substrate. The first substrate includes: a semiconductor chip configured to transmit or receive a first radio-frequency (RF) signal; a first ground layer configured to provide ground to the semiconductor chip; and a signal layer arranged on a side of the first substrate opposite to the semiconductor chip and configured to transmit the first RF signal. The second substrate has an antenna array formed of antenna cells, each of the antenna cells including: a first antenna layer configured to radiate second RF signals based on the first RF signal; a second ground layer configured to provide ground to the first antenna layer. The antenna device further includes a plurality of connectors electrically coupling the semiconductor chip to the antenna array.

Abstract: An infant care apparatus includes a piezoelectric sensor and an infrared array sensor. The piezoelectric sensor senses a respiration rate and a heart rate of an infant. The infrared array sensor senses a body temperature and an occupancy state of the infant in a non-contact manner. The abovementioned infant care apparatus can assist in determining an abnormality of the respiration rate and the heart rate of the infant based on the occupancy state of the infant output by the infrared array sensor, so as to reduce a false alarm rate.

Abstract: A source driving device includes a locking module, a controlling module and a decoding module. The locking module executes a locking process selectively in a first band or a second band according to a band setting signal in order to lock a first clock signal synchronized with a first display signal. The controlling module is coupled to the locking module for comparing a control voltage with a reference voltage in the locking process and generates the band setting signal accordingly. The decoding module is coupled to the locking module for generating a decoded signal according to the first display signal and the first clock signal.

Abstract: A source driving device includes a locking module, a controlling module and a decoding module. The locking module executes a locking process selectively in a first band or a second band according to a band setting signal in order to lock a first clock signal synchronized with a first display signal. The controlling module is coupled to the locking module for comparing a control voltage with a reference voltage in the locking process and generates the band setting signal accordingly. The decoding module is coupled to the locking module for generating a decoded signal according to the first display signal and the first clock signal.

Abstract: A panel includes a timing controller module and a source driver module. The timing controller module is for receiving a first display signal encoded with a first encoding method. The first display signal includes a plurality of first symbols. The timing controller module generates a second display signal with a second encoding method according to the first display signal. The second display signal includes a plurality of second symbols. The plurality of second symbols sequentially and one-to-one correspond to the plurality of first symbols sequentially. Each of the plurality of second symbols includes a first bit and a second bit. The first bit and the second bit have different states. The source driver module is coupled to the timing controller module for decoding the second display signal according to the second encoding method. The source driver module generates a third display signal with the first encoding method.

Abstract: In one aspect of the invention, a driving circuit has a PCB, a transmitter disposed on the PCB for providing an input signal, first and second transmission lines disposed on the PCB and electrically coupled to the transmitter for transmitting the input signal, and a plurality of source drivers formed in a COF architecture disposed between the PCB and the display panel. The input signal is an encoded signal including first and second Gamma reference voltages control signals, and image data. The first and second Gamma reference voltages are transmitted by the PLC technology through the first and second transmission lines, respectively. The driving circuit is implemented with differential transmission of the Gamma voltages, the image data and the control signals.

Abstract: In one aspect of the invention, a driving circuit has a PCB, a transmitter disposed on the PCB for providing an input signal, first and second transmission lines disposed on the PCB and electrically coupled to the transmitter for transmitting the input signal, and a plurality of source drivers formed in a COF architecture disposed between the PCB and the display panel. The input signal is an encoded signal including first and second Gamma reference voltages control signals, and image data. The first and second Gamma reference voltages are transmitted by the PLC technology through the first and second transmission lines, respectively. The driving circuit is implemented with differential transmission of the Gamma voltages, the image data and the control signals.

Abstract: In one aspect of the invention, a driving circuit has a PCB, a transmitter disposed on the PCB for providing an input signal, first and second transmission lines disposed on the PCB and electrically coupled to the transmitter for transmitting the input signal, and a plurality of source drivers formed in a COF architecture disposed between the PCB and the display panel. The input signal is an encoded signal including first and second Gamma reference voltages control signals, and image data. The first and second Gamma reference voltages are transmitted by the PLC technology through the first and second transmission lines, respectively. The driving circuit is implemented with differential transmission of the Gamma voltages, the image data and the control signals.

Abstract: In one aspect of the invention, a driving circuit has a PCB, a transmitter disposed on the PCB for providing an input signal, first and second transmission lines disposed on the PCB and electrically coupled to the transmitter for transmitting the input signal, and a plurality of source drivers formed in a COF architecture disposed between the PCB and the display panel. The input signal is an encoded signal including first and second Gamma reference voltages control signals, and image data. The first and second Gamma reference voltages are transmitted by the PLC technology through the first and second transmission lines, respectively. The driving circuit is implemented with differential transmission of the Gamma voltages, the image data and the control signals.

Abstract: A driving method for a display apparatus used in a driving circuit chip, includes: receiving first and second voltages; outputting the first and second voltages to a first input-stage circuit of a first amplifier and a second input-stage circuit of a second amplifier, respectively, in a first period; outputting the first and second voltages to the second input-stage circuit and the first input-stage circuit, respectively, in a second period; receiving a third voltage outputted from the first input-stage circuit and a fourth voltage outputted from the second input-stage circuit; outputting the third and fourth voltages to the first and second output-stage circuits, respectively, in the first period; and outputting the third and fourth voltages to the second and first output-stage circuits, respectively, in the second period. A driving circuit chip is also provided.

Abstract: The present invention relates to a gate driver circuit and application of the same in a liquid crystal display (LCD) for improving the display performance thereof. The gate driver circuit includes at least one PMOS transistor and two NMOS transistors configured to modify a falling edge of a corresponding scanning signal according to a linear function that defines a waveform shape for the scanning signal.

Abstract: An exemplary gate driving circuit is adapted for receiving an external gate power supply voltage and an external control signal, sequentially generating multiple internal shift data signal groups and thereby sequentially outputting multiple gate signals. Each of the internal shift data signal groups includes multiple sequentially-generated internal shift data signals. The gate driving circuit includes multiple gate signal generating modules. Each of the gate signal generating modules includes a voltage modulation circuit and a gate output buffer circuit. The voltage modulation circuit modulates the external gate power supply voltage according to a corresponding one of the internal shift data signal groups and the external control signal, and thereby a modulated voltage signal is obtained. The gate output buffer circuit includes a plurality of parallel-coupled output stages. The output stages output the modulated voltage signal as a part of the gate signals during the output stages being sequentially enabled.

Abstract: An exemplary gate driving circuit is adapted for receiving an external gate power supply voltage and an external control signal, sequentially generating multiple internal shift data signal groups and thereby sequentially outputting multiple gate signals. Each of the internal shift data signal groups includes multiple sequentially-generated internal shift data signals. The gate driving circuit includes multiple gate signal generating modules. Each of the gate signal generating modules includes a voltage modulation circuit and a gate output buffer circuit. The voltage modulation circuit modulates the external gate power supply voltage according to a corresponding one of the internal shift data signal groups and the external control signal, and thereby a modulated voltage signal is obtained. The gate output buffer circuit includes a plurality of parallel-coupled output stages. The output stages output the modulated voltage signal as a part of the gate signals during the output stages being sequentially enabled.

Abstract: The present invention relates to a gate driver circuit and application of the same in a liquid crystal display (LCD) for improving the display performance thereof. The gate driver circuit includes at least one PMOS transistor and two NMOS transistors configured to modify a falling edge of a corresponding scanning signal according to a linear function that defines a waveform shape for the scanning signal.

Abstract: A display panel includes a display area, a first bonding area, and a second bonding area. The second bonding area is used for bonding with a gate driver. The second bonding area includes a plurality of input pads and a plurality of output pads. The plurality of input pads is disposed on the two sides of the second bonding area in the first direction and on the two sides of the second bonding area only the plurality of input pads is disposed in the second direction. The plurality of output pads is disposed on the center region of the second bonding area in the first direction and on the center region of the second bonding area only the plurality of output pads is disposed in the second direction.

Abstract: A method for producing a transparent, electrically conductive coating onto a substrate. The method includes the steps of (a) providing an ionized arc nozzle which includes a consumable electrode, a non-consumable electrode, and a working gas flow to form an ionized arc between the two electrodes, wherein the consumable electrode provides a metal material vaporizable from the consumable electrode by the ionized arc; (b) operating the arc nozzle to heat and at least partially vaporize the metal material for providing a stream of nanometer-sized metal vapor clusters into a chamber in which the substrate is disposed; (c) introducing a stream of oxygen-containing gas into the chamber to impinge upon the stream of metal vapor clusters and exothermically react therewith to produce substantially nanometer-sized metal oxide clusters; and (d) directing the metal oxide clusters to deposit onto the substrate for forming the coating.

Abstract: A direct-write method for depositing a polarized material of a predetermined computer-aided pattern onto a target surface, the method including the following steps: (1) forming a solution of a material capable of being polarized using a polarization solvent which can be removed by evaporation to provide a polarized material; (2) operating dispensing devices to dispense and deposit the solution onto the target surface substantially point by point and at least partially removing the solvent from the deposited solution to form a thin layer of substantially solidified material of the predetermined pattern; and (3) during the solvent-removing step, operating a high DC voltage for poling the deposited solution to achieve polarization in the material. The invention also provides a freeform fabrication method for building a multi-layer device, such as a micro-electro-mechanical system (MEMS), that exhibits piezoelectric or pyroelectric properties.

Abstract: A method for depositing a coating onto a solid substrate for the fabrication of a functional layer in a solar cell device wherein the functional layer is used as an anti-reflection layer, an active layer for photon absorption and charge generation, a buffer layer, a window layer, or an electrode layer.

Abstract: A method for producing compound semiconductor quantum particles from at least a metallic element selected from Groups IIA, IIB, IIIA, IVA, and VA of the Periodic Table and at least a non-oxygen reactant element selected from the group consisting of P, As, S, Se, and Te. The method includes: (a) operating a heating and atomizing means to provide a stream of super-heated fine-sized fluid droplets of a selected metallic element into a reaction chamber; (b) directing a stream of a reactant element-containing fluid medium into the chamber to impinge upon and react with the super-heated metal fluid droplets to form substantially nanometer-sized phosphide, arsenide, sulfide, selenide, and/or telluride compound particles; and (c) cooling and/or passivating the compound particles to form the desired compound semiconductor quantum particles. These quantum particles are particularly useful for photo luminescence and biological labeling applications.

Abstract: A maskless stereo lithography method and apparatus for forming a three-dimensional object from a plurality of adhered laminae by exposing successive layers of a photo-curable material to a micro-focused energy beam generated by an array of Fresnel zone plates. The method includes the steps of (A) providing a controllable array of Fresnel zone plates; (B) forming a layer of material adjacent to any last formed layer of material in preparation for forming a subsequent lamina of the object; (C) exposing the material to the micro-focused energy beam to form the subsequent lamina of the object; and (D) repeating the steps of forming and exposing a plurality of times in order to form the object from a plurality of adhered laminae, wherein the array of Fresnel zone plates are employed to focus parallel beamlets of energy beam from a source so that the beamlets converge to an array of focal points at predetermined positions of a lamina in accordance with a computer-aided design file of the object.