Abstract: A method of manufacturing a memory device includes providing a substrate, forming a stack layer on the substrate, and forming a hard mask layer on the stack layer. The hard mask layer has a protrusion. The method includes forming a patterned mandrel on the hard mask layer, the patterned mandrel includes a first mandrel disposed adjacent to the protrusion, a second mandrel disposed on the top surface of the protrusion, and a third mandrel. The method further includes using the patterned mandrel as a mask, the hard mask layer and the stack layer are sequentially patterned to form a dummy structure and a word line structure on the substrate. The portion of the stack layer corresponding to the first and second mandrels is formed as the dummy structure. The portion of the stack layer corresponding to the third mandrel is formed as the word line structure.

Abstract: A channel allocation method for a communication device to perform in a wireless personal area network (WPAN) following IEEE 802.15 or SIG protocol, and the communication device is able to operate across a plurality of frequency bands. The channel allocation method includes the following steps. A working frequency band within the plurality of frequency bands is determined, the working frequency band includes at least one clean channel and other channels. One of the at least one clean channel is selected to operate in the WPAN, by the communication device. The at least one clean channel is not used by another communication device in a wireless local area network (WLAN) following IEEE 802.11 protocol.

Abstract: A memory device includes a substrate and a plurality of word lines. The word lines are disposed on the substrate. The word lines extend in the first direction and are arranged in the second direction. The first direction intersects the second direction. The memory device further includes a first sub-select gate extending in the first direction and separated from the outermost word line in the second direction. One end of the first sub-select gate has a first width in the second direction. The major portion of the first sub-select gate has a second width in the second direction. The second width is greater than the first width.

Abstract: A flash memory includes multiple gate stacks arranged on a substrate, and a spacer structure. The spacer structure includes multiple thin spacers covering sidewalls of lower portions of the gate stacks and multiple thick spacers covering sidewalls of upper portions of the gate stacks. The thick spacers are located over the respective thin spacers, and the thick spacers are thicker than the thin spacers. The flash memory also includes a dielectric structure disposed on the spacer structure, and an air gap sealed by the dielectric structure and the spacer structure. The air gap includes a body portion between the thin spacers and a head portion between the thick spacers, and the body portion is wider than the head portion.

Abstract: A Bluetooth (BT) communication method includes: setting a BT frequency hopping configuration in a frequency band that is higher than a 2.4 GHz band; and performing a BT communication operation that is compliant with the BT frequency hopping configuration in the frequency band. In addition, the BT communication method is employed by a BT communication device having a control circuit and a wireless communication circuit.

Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a semiconductor substrate. The semiconductor substrate includes a base portion, a semiconductor bar portion on a first active area of the base portion, a set of semiconductor branch portions extending from a sidewall of the semiconductor bar portion to a second active area of the base portion, and first and second isolation structures formed on the second active area of the base portion. The first interface between the first isolation structure and the semiconductor bar portion is flat. The second interface between the second isolation structure and the semiconductor bar portion is flat. The first interface and the second interface are staggered from each other along the extending direction of the semiconductor bar portion.

Abstract: A power integration system with motor drive and battery charging and discharging function includes a motor, a power integration circuit, and a battery. The motor includes multi-phase paths, and each path has an inductor. The power integration circuit includes an inverter and a charger. The inverter includes multi-phase bridge arms, each bridge arm has an upper switch and a lower switch, and each bridge is correspondingly coupled to each inductor of the motor. The charger a switch, the upper switch and the lower switch of at least one bridge arm of the shared inverter, and the inductor of the shared motor. The switch is coupled between any two bridge arms. The power integration circuit receives a DC power provided by a DC power apparatus, and the charger converts the DC power to charge the battery, and the battery provides power required to drive the motor through the inverter.

Abstract: A power integration system with motor drive and battery charging and discharging function includes a motor, a power integration circuit, and a battery. The power integration circuit includes an inverter and a charger. The inverter includes multi-phase bridge arms, and each bridge arm has an upper switch and a lower switch. Each bridge arm is correspondingly coupled to each phase winding of the motor. The charger includes a front-end DC conversion path, and the upper switch and the lower switch of at least one bridge arm of the shared inverter. The battery is coupled to the power integration circuit. The power integration circuit receives a DC power provided by a DC power apparatus, and the charger converts the DC power to charge the battery. The battery provides the power required to drive the motor by the inverter.

Abstract: A power integration system with motor drive and battery charging and discharging function includes a motor, a power integration circuit, and a battery. The power integration circuit includes an inverter and a charger. The inverter includes multi-phase bridge arms, and each bridge arm has an upper switch and a lower switch. Each bridge arm is correspondingly coupled to each phase winding of the motor. The charger includes a charging unit having at least a switch, an inductor, or a diode and the upper switch and the lower switch of at least one bridge arm of the shared inverter. The power integration circuit receives a DC power provided by a DC power apparatus, and the charger converts the DC power to charge the battery. The battery provides the required power of driving the motor through the inverter.

Abstract: Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.

Abstract: A memory structure and its manufacturing method are provided. The memory structure includes a substrate having active regions, wherein adjacent active regions are separated by an isolation structure. The memory structure includes several stacked structures disposed on the active regions, respectively. Each of the stacked structures includes a tunnel dielectric layer on the substrate and a floating gate on the tunnel dielectric layer. The floating gate includes a lower silicon layer and an upper silicon layer, wherein the lower silicon layer includes one or more dopants selected from nitrogen gas, carbon, or a combination thereof. The upper silicon layer is disposed on the lower silicon layer.

Abstract: The disclosure provides a power switching circuit. The power switching circuit includes a driving circuit, a determining circuit, a first power switch, and a second power switch. The driving circuit outputs a first driving signal and a second driving signal. The determining circuit is coupled to the driving circuit and outputs a control signal to the driving circuit. The first power switch is coupled to a first input voltage and receives the first driving signal. The second power switch is coupled to a second input voltage and receives the second driving signal. When the first power switch and the second power switch are switched, the second driving signal rises from a first level to a preset level, and the determining circuit controls the driving circuit to utilize the first driving signal to turn off the first power switch.

Abstract: The invention relates to a detective molecule, and more particularly to a detective molecule and a kit for detecting a target molecule, a method for predicting fragrance production in an orchid, and a method for breeding a scented orchid.

Abstract: The disclosure provides a power switching circuit. The power switching circuit includes a driving circuit, a determining circuit, a first power switch, and a second power switch. The driving circuit outputs a first driving signal and a second driving signal. The determining circuit is coupled to the driving circuit and outputs a control signal to the driving circuit. The first power switch is coupled to a first input voltage and receives the first driving signal. The second power switch is coupled to a second input voltage and receives the second driving signal. When the first power switch and the second power switch are switched, the second driving signal rises from a first level to a preset level, and the determining circuit controls the driving circuit to utilize the first driving signal to turn off the first power switch.

Abstract: The invention relates to a nucleic acid molecule that improves aroma production in an orchid, and a cell and a transgenic orchid comprising the nucleic acid molecule. The invention further relates to a polypeptide that improves aroma production in an orchid, and a method for improving the production of aroma in an orchid.

Abstract: The invention relates to a detective molecule, and more particularly to a detective molecule and a kit for detecting a target molecule, a method for predicting fragrance production in an orchid, and a method for breeding a scented orchid.

Abstract: A power switch circuit includes a first input voltage, a first switch element, a switcher, a first bootstrap capacitor, and a second bootstrap capacitor. The first switch element includes a first control end, a first input end, and a first output end. The first input end is coupled to the first input voltage. The first output end provides an output voltage. The switcher is coupled to the first switch element. The first bootstrap capacitor is coupled to the switcher and provides a first driving voltage. The second bootstrap capacitor is coupled to the switcher and provides a second driving voltage. The first bootstrap capacitor and the second bootstrap capacitor alternately supply the first driving voltage or the second driving voltage to the first control end through an operation of the switcher.

Abstract: An antenna disposed on a substrate includes a radiating portion, a first coupling and feeding portion, and a second coupling and feeding portion. A length of the radiating portion is substantially equal to a half wavelength of electromagnetic signals radiated by the radiating portion. Each coupling and feeding portion includes a feeding part and a coupling part. The feeding part feeds the electromagnetic signals to the radiating portion via the coupling part so as to achieve effects of a multiple-input multiple-output (MIMO) antenna.

Abstract: An antenna disposed on a substrate includes a radiating portion, a first coupling and feeding portion, and a second coupling and feeding portion. A length of the radiating portion is substantially equal to a half wavelength of electromagnetic signals radiated by the radiating portion. Each coupling and feeding portion includes a feeding part and a coupling part. The feeding part feeds the electromagnetic signals to the radiating portion via the coupling part so as to achieve effects of a multiple-input multiple-output (MIMO) antenna. A gap is defined between the coupling part and the radiating portion to improve an isolation of the MIMO antenna.