Patents by Inventor Wen-Chih Lee

Wen-Chih Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11989966
    Abstract: A method for forming semiconductor devices includes providing a substrate with a conductive pad formed thereon; forming a transparent structure over the substrate, wherein the transparent structure includes a plurality of collimating pillars adjacent to the conductive pad; forming a light-shielding structure over the plurality of collimating pillars and the conductive pad; performing a cutting process to remove one or more materials directly above the conductive pad, while leaving remaining material to cover the conductive pad, wherein the material includes a portion of the light-shielding structure; and performing an etching process to remove the remaining material to expose the conductive pad.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: May 21, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Chih-Hsien Chen
  • Publication number: 20240133745
    Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.
    Type: Application
    Filed: October 19, 2022
    Publication date: April 25, 2024
    Inventors: Chein-Hsun WANG, Ming LE, Tung-Yang LEE, Yu-Chih LIANG, Wen-Chie HUANG, Chen-Tang HUANG, Jenping KU
  • Patent number: 11935795
    Abstract: Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hung Wang, Tsung-Lin Lee, Wen-Chih Chiang, Kuan-Jung Chen
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Patent number: 11928416
    Abstract: A method of process technology assessment is provided. The method includes: defining a scope of the process technology assessment, the scope comprising an original process technology and a first process technology; modeling a first object in an integrated circuit into a resistance domain and a capacitance domain; generating a first resistance scaling factor and a first capacitance scaling factor based on the modeling, the original process technology, and the first process technology; and utilizing, by an electronic design automation (EDA) tool, the first resistance scaling factor and the first capacitance scaling factor for simulation of the integrated circuit.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Chih Ou, Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang
  • Patent number: 9177146
    Abstract: A database of known graphical user interface layouts is generated using samples of known executable files. An executable file having an unknown function is obtained; it is executed within a safe environment and its graphical user interface is identified. Layout analysis enumerates all of the windows within the interface and extracts the position values of each window and the dimension values of each window to form a set of layout information. If the layout database contains this layout information set then it is determined that the layout information is of the same type of software corresponding to the type of software contained within the database (or of the type of software to which the layout information is matched within the database). A match may occur if all the windows match, if only some percentage of the windows match, or if the windows do not match exactly but the dimensions of the corresponding window in the database are within a certain percentage.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: November 3, 2015
    Assignee: Trend Micro, Inc.
    Inventors: Wen-Chih Lee, Ming-Chang Shih, Wei-Chung Chou
  • Patent number: 8601584
    Abstract: A computer is protected from argument switch attacks by intercepting a function call to terminate a process. The function call and a handle used as an argument in the function call are forwarded by an antivirus system service descriptor table to an antivirus. The antivirus is configured to evaluate the function call to determine whether or not the function call is terminating an antivirus process. A consistent handle table includes a listing of handles of processes employed as arguments in function calls that terminate processes and are approved by the antivirus. Instructions that close a handle are detected by the antivirus, which compares the handle to those in the consistent handle table. The antivirus blocks those instructions that close a handle that is included in the consistent handle table.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: December 3, 2013
    Assignee: Trend Micro Incorporated
    Inventors: Royce Lu, Ming-Chang Shih, Wen-Chih Lee
  • Patent number: 6535829
    Abstract: The present invention provides a system, comprising an exposure apparatus and a control mean electrically connected to the exposure apparatus, for calculating exposure energy (Ee). The control mean executes an exposure energy calculation program according to mask data, comprising an actual transparency percentage parameter (Ta) and a mask error, and a critical dimension (CD) specification, comprising at least a basic transparency percentage parameter (Tb), a transparency constant (Tc), a CD energy constant (Cc) and a basic exposure energy, to calculate the exposure energy and output the exposure energy to the exposure apparatus. In the exposure energy calculation program, the basic transparency percentage parameter (Tb) is firstly subtracted from the actual transparency percentage parameter (Ta). The resulting difference is then multiplied together with the transparency constant (Tc) parameter to calculate a transparency percentage difference energy.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: March 18, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Wen-Chih Lee, Yu-Ming Chuang
  • Publication number: 20020188412
    Abstract: The present invention provides a system, comprising an exposure apparatus and a control mean electrically connected to the exposure apparatus, for calculating exposure energy (Ee). The control mean executes an exposure energy calculation program according to mask data, comprising an actual transparency percentage parameter (Ta) and a mask error, and a critical dimension (CD) specification, comprising at least a basic transparency percentage parameter (Tb), a transparency constant (Tc), a CD energy constant (Cc) and a basic exposure energy, to calculate the exposure energy and output the exposure energy to the exposure apparatus. In the exposure energy calculation program, the basic transparency percentage parameter (Tb) is firstly subtracted from the actual transparency percentage parameter (Ta). The resulting difference is then multiplied together with the transparency constant (Tc) parameter to calculate a transparency percentage difference energy.
    Type: Application
    Filed: June 12, 2001
    Publication date: December 12, 2002
    Inventors: Wen -Chih Lee, Yu-Ming Chuang