Patents by Inventor Wen-Chih Lin
Wen-Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973055Abstract: In an embodiment, a device includes: a first wafer including a first substrate and a first interconnect structure, a sidewall of the first interconnect structure forming an obtuse angle with a sidewall of the first substrate; and a second wafer bonded to the first wafer, the second wafer including a second substrate and a second interconnect structure, the sidewall of the first substrate being laterally offset from a sidewall of the second substrate and a sidewall of the second interconnect structure.Type: GrantFiled: July 21, 2022Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yung-Chi Lin, Tsang-Jiuh Wu, Wen-Chih Chiou, Chen-Hua Yu
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Publication number: 20240136444Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.Type: ApplicationFiled: December 22, 2023Publication date: April 25, 2024Inventors: Yu-Chu Lin, Chi-Chung Jen, Wen-Chih Chiang, Yi-Ling Liu, Huai-Jen Tung, Keng-Ying Liao
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Publication number: 20240136324Abstract: A semiconductor manufacturing method is provided. The semiconductor manufacturing method includes the following steps. A first semiconductor element with a bonding film and a first stressing film is formed. The first bonding film and the first stressing film are formed on two opposite sides of the first semiconductor element. The first stressing film makes the first bonding film to have a first convex surface. A second semiconductor element with a second bonding film is formed. The second bonding film is formed on one side of the second semiconductor element. The first semiconductor element and the second semiconductor element are bonded by bonding the first bonding film and the second bonding film.Type: ApplicationFiled: January 19, 2023Publication date: April 25, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Chih CHIOU, Yen-Ming CHEN, Yung-Chi LIN
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Publication number: 20240136199Abstract: A semiconductor device and a semiconductor manufacturing method thereof are provided. The semiconductor manufacturing method includes the following streps. A first semiconductor element with a first bonding film is formed. The first bonding film is formed on a first side of the first semiconductor element. The first semiconductor element and the first bonding film form a taper structure. The first bonding film forms a wide portion of the taper structure. The first semiconductor element forms a narrow portion of the taper structure. A second semiconductor element with a second bonding film is formed. The second bonding film is formed on the second semiconductor element. The first semiconductor element and the second semiconductor element are bonded by bonding the first bonding film and the second bonding film. An oxide layer is filled to surround the first semiconductor element and the first bonding film.Type: ApplicationFiled: January 20, 2023Publication date: April 25, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yung-Chi LIN, Tsang-Jiuh WU, Wen-Chih CHIOU
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Publication number: 20240133427Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.Type: ApplicationFiled: December 20, 2022Publication date: April 25, 2024Inventors: KUN-CHENG TSENG, KUEI-TUN TENG, WEI-CHIH CHEN, WEN-CHUNG LIN
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Patent number: 11964409Abstract: A multi-shot moulding part structure includes a first structural part, an ink decoration layer, and a second structural part. The first structural part has a first area surface, a second area surface, and a joining surface located on the second area surface. The joining surface is non-parallel to the second area surface. The ink decoration layer is spread on the first area surface and the second area surface, but not on the joining surface. The second structural part is combined with the first structural part and covers the second area surface. The second structural part touches the joining surface. By the second structural part touching the joining surface of the first structural part that is not coated with the ink decoration layer, the structural bonding strength between the first structural part and the second structural part is enhanced.Type: GrantFiled: August 31, 2021Date of Patent: April 23, 2024Assignees: Inventec (Pudong) Technology Corp., Inventec CorporationInventors: Wen-Ching Lin, Ting-Yu Wang, Fa-Chih Ke, Yu-Ling Lin, Wen-Hsiang Chen
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Publication number: 20240120203Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.Type: ApplicationFiled: March 8, 2023Publication date: April 11, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Te-Chih HSIUNG, Yun-Hua CHEN, Bing-Sian WU, Yi-Hsuan CHIU, Yu-Wei CHANG, Wen-Kuo HSIEH, Chih-Yuan TING, Huan-Just LIN
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Patent number: 11948920Abstract: Provided are a semiconductor device and a method for manufacturing the same, and a semiconductor package. The semiconductor device includes a die stack and a cap substrate. The die stack includes a first die, second dies stacked on the first die, and a third die stacked on the second dies. The first die includes first through semiconductor vias. Each of the second dies include second through semiconductor vias. The third die includes third through semiconductor vias. The cap substrate is disposed on the third die of the die stack. A sum of a thickness of the third die and a thickness of the cap substrate ranges from about 50 ?m to about 80 ?m.Type: GrantFiled: August 30, 2021Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-Chun Hsu, Yan-Zuo Tsai, Chia-Yin Chen, Yang-Chih Hsueh, Yung-Chi Lin, Tsang-Jiuh Wu, Wen-Chih Chiou
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Publication number: 20240107414Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
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Patent number: 11942543Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.Type: GrantFiled: June 29, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
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Patent number: 11939431Abstract: The present invention relates to a composition comprising an amino acid-modified polymer, a carboxypolysaccharide, and may further include a metal ion for anti-adhesion and vector application. More specifically, the invention relates to a thermosensitive composition having enhanced mechanical and improved water-erosion resistant properties for efficiently preventing tissue adhesions and can serve as a vector with bio-compatible, bio-degradable/absorbable, and in-vivo sustainable properties.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11939432Abstract: Synthetic amino acid-modified polymers and methods of making the same and using the same are disclosed. The synthetic amino acid-modified polymers possess distinct thermosensitive, improved water-erosion resistant, and enhanced mechanical properties, and are suitable of reducing or preventing formation of postoperative tissue adhesions. Additionally, the amino acid-modified polymers can also be used as a vector to deliver pharmaceutically active agents.Type: GrantFiled: April 23, 2021Date of Patent: March 26, 2024Assignee: PROVIEW-MBD BIOTECH CO., LTD.Inventors: Yu-Chia Chang, Yunn-Kuen Chang, Wen-Yen Huang, Ging-Ho Hsiue, Hsieh-Chih Tsai, Shuian-Yin Lin, Nai-Sheng Hsu, Tzu-Yu Lin
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Patent number: 11935981Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.Type: GrantFiled: June 30, 2021Date of Patent: March 19, 2024Assignee: EPISTAR CORPORATIONInventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
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Publication number: 20240088123Abstract: A device package includes a first die directly bonded to a second die at an interface, wherein the interface comprises a conductor-to-conductor bond. The device package further includes an encapsulant surrounding the first die and the second die and a plurality of through vias extending through the encapsulant. The plurality of through vias are disposed adjacent the first die and the second die. The device package further includes a plurality of thermal vias extending through the encapsulant and a redistribution structure electrically connected to the first die, the second die, and the plurality of through vias. The plurality of thermal vias is disposed on a surface of the second die and adjacent the first die.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Inventors: Chen-Hua Yu, Yung-Chi Lin, Wen-Chih Chiou
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Publication number: 20240090230Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.Type: ApplicationFiled: January 9, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240074119Abstract: An immersion cooling system includes a pressure seal tank, an electronic apparatus, a pressure balance pipe and a relief valve. The pressure seal tank is configured to store coolant. A vapor space is formed in the pressure seal tank above the liquid level of the coolant. The electronic apparatus is completely immersed in the coolant. The pressure balance pipe has a gas collection length. The first port of the pressure balance pipe is disposed on the top surface of the pressure seal tank. The relief valve is disposed on the second port of the pressure balance pipe. The second port is farther away from the top surface of the pressure seal tank than the first port. The gas collection length of the pressure equalization tube allows the concentration of vaporized coolant at the first port to be greater than the concentration of vaporized coolant at the second port.Type: ApplicationFiled: May 9, 2023Publication date: February 29, 2024Inventors: Ren-Chun CHANG, Wei-Chih LIN, Sheng-Chi WU, Wen-Yin TSAI, Li-Hsiu CHEN
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Patent number: 11911951Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyester modifier, 0.01% to 2% by weight of an inorganic filler, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.Type: GrantFiled: September 4, 2020Date of Patent: February 27, 2024Assignee: NAN YA PLASTICS CORPORATIONInventors: Te-Chao Liao, Wen-Cheng Yang, Wen-Jui Cheng, Chia-Yen Hsiao, Chien-Chih Lin
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Publication number: 20240017538Abstract: A lamination chuck for lamination of film materials includes a support layer and a top layer. The top layer is disposed on the support layer. The top layer includes a polymeric material having a Shore A hardness lower than a Shore hardness of a material of the support layer. The top layer and the support layer have at least one vacuum channel formed therethrough, vertically extending from a top surface of the top layer to a bottom surface of the support layer.Type: ApplicationFiled: August 2, 2023Publication date: January 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Jie Huang, Yu-Ching Lo, Ching-Pin Yuan, Wen-Chih Lin, Cheng-Yu Kuo, Yi-Yang Lei, Ching-Hua Hsieh
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Publication number: 20220314595Abstract: A lamination chuck for lamination of film materials includes a support layer and a top layer. The top layer is disposed on the support layer. The top layer includes a polymeric material having a Shore A hardness lower than a Shore hardness of a material of the support layer. The top layer and the support layer have at least one vacuum channel formed therethrough, vertically extending from a top surface of the top layer to a bottom surface of the support layer.Type: ApplicationFiled: August 5, 2021Publication date: October 6, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Jie Huang, Yu-Ching Lo, Ching-Pin Yuan, Wen-Chih Lin, Cheng-Yu Kuo, Yi-Yang Lei, Ching-Hua Hsieh
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Publication number: 20190309986Abstract: A water heater includes a tank and a heating pipe. The tank has a water storage space therein. A bottom of the tank is provided with a cold water inlet and a circulation outlet. The tank is provided with a hot water outlet located at a position not less than one half height of the tank. The heating pipe is connected with a circulation pipe outside the tank to communicate with the circulation outlet. The heating pipe extends upward from the bottom of the tank into the water storage space. The heating pipe is provided with an opening facing sideways. The opening is located at a certain height of the water storage space. An outside of the heating pipe is provided with a heating device for heating the heating pipe.Type: ApplicationFiled: April 4, 2018Publication date: October 10, 2019Inventors: GUO QIANG TU, WEN CHIH LIN, HUNG YUEH LO