Patents by Inventor Wen-Ching Hsiung
Wen-Ching Hsiung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8395869Abstract: ESD protection circuit with EOS immunity is provided, which includes a first connection circuit, a first EOS control circuit formed by at least a diode, and an ESD clamp respectively coupled between a pad, a first clamp node, an I/O clamp node and a second source node. When the ESD clamp detects ESD through the I/O clamp node, it is triggered to conduct from the I/O clamp node to the second source node. When the pad receives EOS, the first EOS control circuit provides a cross voltage between the first clamp node and the I/O clamp node, such that a voltage of the I/O clamp node becomes less than a characteristic voltage of the ESD clamp to prevent the ESD clamp from reverse conducting.Type: GrantFiled: December 21, 2010Date of Patent: March 12, 2013Assignee: Faraday Technology Corp.Inventors: Fu-Yi Tsai, Po-Chun Hsieh, Wen-Ching Hsiung
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Publication number: 20120154960Abstract: ESD protection circuit with EOS immunity is provided, which includes a first connection circuit, a first EOS control circuit formed by at least a diode, and an ESD clamp respectively coupled between a pad, a first clamp node, an I/O clamp node and a second source node. When the ESD clamp detects ESD through the I/O clamp node, it is triggered to conduct from the I/O clamp node to the second source node. When the pad receives EOS, the first EOS control circuit provides a cross voltage between the first clamp node and the I/O clamp node, such that a voltage of the I/O clamp node becomes less than a characteristic voltage of the ESD clamp to prevent the ESD clamp from reverse conducting.Type: ApplicationFiled: December 21, 2010Publication date: June 21, 2012Applicant: FARADAY TECHNOLOGY CORPORATIONInventors: Fu-Yi Tsai, Po-Chun Hsieh, Wen-Ching Hsiung
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Patent number: 7825697Abstract: A signal detection circuit is used for detecting signal squelch of a differential input signal to generate a corresponding digital output signal. The signal detection circuit includes: a reference voltage generator for generating a reference voltage of which the common mode voltage tracks the common mode voltage of the input signal; a real-time signal judgment circuit, real-time rectifying and amplifying a difference between the input signal and the reference voltage; and a deglitch circuit, sampling and/or amplifying an output signal of the real-time signal judgment circuit, and transforming sampling results into the digital output signal to reflect signal squelch of the differential input signal.Type: GrantFiled: February 29, 2008Date of Patent: November 2, 2010Assignee: Faraday Technology Corp.Inventors: Wen-Ching Hsiung, Kuan-Yu Chen, Jeng-Dau Chang, Chia-Liang Lai
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Patent number: 7795926Abstract: A phase detector, including a sampling device, a comparing device, and an output device, is provided. The sampling device samples a data signal according to a plurality of clock signals, so as to provide a plurality of corresponding sampling values. The clock signals have the same frequency and different phases. The comparing device is coupled to the sampling device, and provides a plurality of corresponding comparison values according to comparison results of each of the sampling values comparing with the next sampling value. The output device is coupled to the comparing device, and outputs two of the comparison values in response to edges of the clock signals. The two outputted comparison values serve as a first instruction signal and a second instruction signal respectively. The first and the second instruction signals are referred to in controlling the frequency and the phase of the foregoing clock signals.Type: GrantFiled: April 11, 2008Date of Patent: September 14, 2010Assignee: Faraday Technology Corp.Inventors: Yu-Hsin Tseng, Wen-Ching Hsiung
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Patent number: 7782095Abstract: A signal comparison circuit is provided. The signal comparison circuit includes a first amplifier, a second amplifier, a peak detector, and a comparator. The first amplifier is a zero-peaking amplifier. The first amplifier receives and amplifies a data signal. The second amplifier receives and amplifies a reference voltage. The peak detector is coupled to the first and the second amplifiers for detecting and maintaining maximum values of the amplified data signal and the amplified reference voltage, and then outputting the maintained data signal and the maintained reference voltage. The comparator is coupled to the peak detector for comparing the maintained data signal with the maintained reference voltage and outputting a result of the comparison.Type: GrantFiled: November 26, 2007Date of Patent: August 24, 2010Assignee: Faraday Technology Corp.Inventors: Wen-Ching Hsiung, Chia-Liang Lai, Kuan-Yu Chen, Jeng-Dau Chang
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Patent number: 7782142Abstract: A differential to single ended converting circuit includes a transconductance circuit having input terminals for receiving differential input voltages and having a first current output terminal for outputting a first current and a second current output terminal for outputting a second current; an offset cancellation circuit having a first controllable current source connected to the first current output terminal and a second controllable current source connected to the second current output terminal; a first transimpedance circuit having an input terminal connected to the first current output terminal and an output terminal for outputting a first voltage; a second transimpedance circuit having an input terminal connected to the second current output terminal and an output terminal for outputting a second voltage; and a first inverter having an input terminal connected to the output terminal of the first transimpedance circuit and an output terminal for outputting a first single ended output voltage.Type: GrantFiled: June 1, 2009Date of Patent: August 24, 2010Assignee: Faraday Technology Corp.Inventors: Inn-Fu Lin, Wen-Ching Hsiung
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Patent number: 7764088Abstract: A frequency detection circuit and a detection method thereof suitable for a clock data recovery (CDR) circuit are provided. The frequency detection circuit includes a phase detector, a first delayer, a frequency detector, and a logic circuit. The phase detector samples a data signal according to a first clock signal provided by the CDR circuit and provides a phase instruction signal according to the sampling. The first delayer delays the first clock signal to obtain a second clock signal. The frequency detector samples the data signal according to the second clock signal and provides a frequency instruction signal according to the sampling. The logic circuit generates a clock instruction signal according to the phase instruction signal and the frequency instruction signal. The CDR circuit adjusts the frequency of the first clock signal according to the status of the clock instruction signal.Type: GrantFiled: September 24, 2008Date of Patent: July 27, 2010Assignee: Faraday Technology Corp.Inventors: Kuan-Yu Chen, Wen-Ching Hsiung, Cheng-Tao Chang, Chia-Liang Lai
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Patent number: 7706115Abstract: Over-voltage indicator and related circuit and method. The over-voltage indicator can work with an I/O circuit of a chip for detecting over-voltage in an I/O pad and providing an indication signal accordingly. When over-voltage does not happen, the over-voltage indicator continues to detect a signal level of the I/O pad and keeps the indication signal low. Once over-voltage is detected, the over-voltage indicator pauses detecting, asserts a high level in the indication signal, and periodically resumes detecting until end of over-voltage is detected. With informing provided by the indication signal, a core cell of the chip can perform proper operation to reduce potential damage caused by over-voltage.Type: GrantFiled: November 3, 2007Date of Patent: April 27, 2010Assignee: Faraday Technology Corp.Inventors: Wen-Ching Hsiung, Jeng-Dau Chang, Chia-Liang Lai, Kuan-Yu Chen
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Publication number: 20100073045Abstract: A frequency detection circuit and a detection method thereof suitable for a clock data recovery (CDR) circuit are provided. The frequency detection circuit includes a phase detector, a first delayer, a frequency detector, and a logic circuit. The phase detector samples a data signal according to a first clock signal provided by the CDR circuit and provides a phase instruction signal according to the sampling. The first delayer delays the first clock signal to obtain a second clock signal. The frequency detector samples the data signal according to the second clock signal and provides a frequency instruction signal according to the sampling. The logic circuit generates a clock instruction signal according to the phase instruction signal and the frequency instruction signal. The CDR circuit adjusts the frequency of the first clock signal according to the status of the clock instruction signal.Type: ApplicationFiled: September 24, 2008Publication date: March 25, 2010Applicant: FARADAY TECHNOLOGY CORP.Inventors: Kuan-Yu Chen, Wen-Ching Hsiung, Cheng-Tao Chang, Chia-Liang Lai
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Publication number: 20090295481Abstract: A differential to single ended converting circuit includes a transconductance circuit having input terminals for receiving differential input voltages and having a first current output terminal for outputting a first current and a second current output terminal for outputting a second current; an offset cancellation circuit having a first controllable current source connected to the first current output terminal and a second controllable current source connected to the second current output terminal; a first transimpedance circuit having an input terminal connected to the first current output terminal and an output terminal for outputting a first voltage; a second transimpedance circuit having an input terminal connected to the second current output terminal and an output terminal for outputting a second voltage; and a first inverter having an input terminal connected to the output terminal of the first transimpedance circuit and an output terminal for outputting a first single ended output voltage.Type: ApplicationFiled: June 1, 2009Publication date: December 3, 2009Applicant: FARADAY TECHNOLOGY CORPORATIONInventors: INN-FU LIN, WEN-CHING HSIUNG
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Publication number: 20090256629Abstract: A phase detector, including a sampling device, a comparing device, and an output device, is provided. The sampling device samples a data signal according to a plurality of clock signals, so as to provide a plurality of corresponding sampling values. The clock signals have the same frequency and different phases. The comparing device is coupled to the sampling device, and provides a plurality of corresponding comparison values according to comparison results of each of the sampling values comparing with the next sampling value. The output device is coupled to the comparing device, and outputs two of the comparison values in response to edges of the clock signals. The two outputted comparison values serve as a first instruction signal and a second instruction signal respectively. The first and the second instruction signals are referred to in controlling the frequency and the phase of the foregoing clock signals.Type: ApplicationFiled: April 11, 2008Publication date: October 15, 2009Applicant: FARADAY TECHNOLOGY CORP.Inventors: Yu-Hsin Tseng, Wen-Ching Hsiung
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Publication number: 20090219056Abstract: A signal detection circuit is used for detecting signal squelch of a differential input signal to generate a corresponding digital output signal. The signal detection circuit includes: a reference voltage generator for generating a reference voltage of which the common mode voltage tracks the common mode voltage of the input signal; a real-time signal judgment circuit, real-time rectifying and amplifying a difference between the input signal and the reference voltage; and a deglitch circuit, sampling and/or amplifying an output signal of the real-time signal judgment circuit, and transforming sampling results into the digital output signal to reflect signal squelch of the differential input signal.Type: ApplicationFiled: February 29, 2008Publication date: September 3, 2009Applicant: Faraday Technology Corp.Inventors: Wen-Ching Hsiung, Kuan-Yu Chen, Jeng-Dau Chang, Chia-Liang Lai
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Publication number: 20090134913Abstract: A signal comparison circuit is provided. The signal comparison circuit includes a first amplifier, a second amplifier, a peak detector, and a comparator. The first amplifier is a zero-peaking amplifier. The first amplifier receives and amplifies a data signal. The second amplifier receives and amplifies a reference voltage. The peak detector is coupled to the first and the second amplifiers for detecting and maintaining maximum values of the amplified data signal and the amplified reference voltage, and then outputting the maintained data signal and the maintained reference voltage. The comparator is coupled to the peak detector for comparing the maintained data signal with the maintained reference voltage and outputting a result of the comparison.Type: ApplicationFiled: November 26, 2007Publication date: May 28, 2009Applicant: FARADAY TECHNOLOGY CORP.Inventors: Wen-Ching Hsiung, Chia-Liang Lai, Kuan-Yu Chen, Jeng-Dau Chang
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Publication number: 20080285196Abstract: Over-voltage indicator and related circuit and method. The over-voltage indicator can work with an I/O circuit of a chip for detecting over-voltage in an I/O pad and providing an indication signal accordingly. When over-voltage does not happen, the over-voltage indicator continues to detect a signal level of the I/O pad and keeps the indication signal low. Once over-voltage is detected, the over-voltage indicator pauses detecting, asserts a high level in the indication signal, and periodically resumes detecting until end of over-voltage is detected. With informing provided by the indication signal, a core cell of the chip can perform proper operation to reduce potential damage caused by over-voltage.Type: ApplicationFiled: November 3, 2007Publication date: November 20, 2008Applicant: FARADAY TECHNOLOGY CORPORATIONInventors: Wen-Ching Hsiung, Jeng-Dau Chang, Chia-Liang Lai, Kuan-Yu Chen