Patents by Inventor Wen-Ching Sung

Wen-Ching Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250107148
    Abstract: A thin film transistor includes a semiconductor layer, a gate insulating layer and a gate. The semiconductor layer has a first heavily doped region, a first lightly doped region, a first intrinsic region, a second lightly doped region, a second intrinsic region, a third lightly doped region and a second heavily doped region. A first conductive pattern of the gate has a first portion, a second portion and an opening portion. The first portion of the first conductive pattern shields the first intrinsic region. The second portion of the first conductive pattern shields the second intrinsic region. The opening portion of the first conductive pattern overlaps the second lightly doped region. A second conductive pattern of the gate covers the first conductive pattern. The second conductive pattern has a first portion and a second portion that are located on two opposite sides of the first conductive pattern.
    Type: Application
    Filed: December 18, 2023
    Publication date: March 27, 2025
    Applicant: AUO Corporation
    Inventors: Ssu-Hui Lu, Wen-Ching Sung, Hsiu-Chun Hsieh
  • Patent number: 12218153
    Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display area and a non-display area. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and a light-emitting element. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer, and the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes; a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and is electrically connected to the electrodes of the electrode pattern layer.
    Type: Grant
    Filed: June 27, 2021
    Date of Patent: February 4, 2025
    Assignee: Au Optronics Corporation
    Inventors: Wen-Ching Sung, Wei-Hung Kuo
  • Publication number: 20240413285
    Abstract: A display device includes a substrate, a transistor, a first conductive feature, a conductive pad and a light-emitting device. The substrate has a first area. The transistor is located in the first area. The first conductive feature is located over the transistor and electrically connects a source/drain of the transistor. The first conductive feature includes a first protective layer and a first conductive layer. The first protective layer has a first thickness and at least includes titanium. The first conductive layer is located above the first protective layer, has a second thickness and includes aluminum. The second thickness is greater than the first thickness. The conductive pad is located on the first conductive feature and electrically connects the first conductive feature. The conductive pad at least includes nickel and gold. The light-emitting device is located on the conductive pad and electrically connects the conductive pad.
    Type: Application
    Filed: December 27, 2023
    Publication date: December 12, 2024
    Inventors: Wen-Ching SUNG, Kuo-Yu Huang
  • Publication number: 20220208802
    Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display area and a non-display area. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and a light-emitting element. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer, and the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes; a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and is electrically connected to the electrodes of the electrode pattern layer.
    Type: Application
    Filed: June 27, 2021
    Publication date: June 30, 2022
    Applicant: Au Optronics Corporation
    Inventors: Wen-Ching Sung, Wei-Hung Kuo
  • Patent number: 10811441
    Abstract: A pixel array substrate including a substrate, an active device, a planarization layer, a first conductive layer, a first insulation layer and a second conductive layer is provided. The active device is disposed on the substrate. The planarization layer covers the active device and has a first opening. The first conductive layer is disposed on the planarization layer and is electrically connected with a first end of the active device. The first insulation layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulation layer. The first conductive layer and the second conductive layer cover a side surface of the first opening of the planarization layer.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: October 20, 2020
    Assignee: Au Optronics Corporation
    Inventors: Ming-Yao Chen, Kuo-Yu Huang, Wen-Ching Sung
  • Publication number: 20200152662
    Abstract: A pixel array substrate including a substrate, an active device, a planarization layer, a first conductive layer, a first insulation layer and a second conductive layer is provided. The active device is disposed on the substrate. The planarization layer covers the active device and has a first opening. The first conductive layer is disposed on the planarization layer and is electrically connected with a first end of the active device. The first insulation layer is disposed on the first conductive layer. The second conductive layer is disposed on the first insulation layer. The first conductive layer and the second conductive layer cover a side surface of the first opening of the planarization layer.
    Type: Application
    Filed: June 14, 2019
    Publication date: May 14, 2020
    Applicant: Au Optronics Corporation
    Inventors: Ming-Yao Chen, Kuo-Yu Huang, Wen-Ching Sung
  • Patent number: 8911097
    Abstract: A display device includes a substrate, a light shielding layer, at least one fading pattern and a display module. The display module is disposed on the substrate and has a display area. The light shielding layer is disposed on a periphery of the substrate and has a first side and a second side, wherein the first side is opposite to the second side. The at least one fading pattern is disposed on the substrate, is adjacent to at least one side of the first side and the second side of the light shielding layer, and does not overlap the display area of the display module. Each fading pattern includes N light transmissible areas, the N light transmissible areas are adjacent to each other, and transmittances of the N light transmissible areas are different from each other, wherein N is a positive integer larger than one.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: December 16, 2014
    Assignee: AU Optronics Corp.
    Inventors: Wen-Ching Sung, Chien-Wei Chen, Cheng-Hsing Lin, Yu-Ying Tang, Wei-Hung Kuo, Shih-Po Chou
  • Publication number: 20140133046
    Abstract: A display device includes a substrate, a light shielding layer, at least one fading pattern and a display module. The display module is disposed on the substrate and has a display area. The light shielding layer is disposed on a periphery of the substrate and has a first side and a second side, wherein the first side is opposite to the second side. The at least one fading pattern is disposed on the substrate, is adjacent to at least one side of the first side and the second side of the light shielding layer, and does not overlap the display area of the display module. Each fading pattern includes N light transmissible areas, the N light transmissible areas are adjacent to each other, and transmittances of the N light transmissible areas are different from each other, wherein N is a positive integer larger than one.
    Type: Application
    Filed: May 15, 2013
    Publication date: May 15, 2014
    Applicant: AU Optronics Corp.
    Inventors: Wen-Ching Sung, Chien-Wei Chen, Cheng-Hsing Lin, Yu-Ying Tang, Wei-Hung Kuo, Shih-Po Chou