Abstract: An electronic device includes a BMC, a BIOS, and a UART connected to at least one external input device. The UART includes a number of registers. The BMC is connected to the UART to initialize the registers and is also connected to a south bridge and transmits a restarting signal to the south bridge when the BMC is restarted. The BIOS is connected to the UART and stores input from the input device to the registers, the BIOS is also connected to the south bridge and detects whether the BMC generates the restarting signal to the south bridge. The BIOS then enables or disables the registers to store or not to store the input from the external input device according to whether the BMC generates the restarting signal.

Abstract: A baseboard management controller (BMC) of a server includes a general purpose input output (GPIO) pin. An voltage level of the GPIO level determines if a BIOS of the server or the BMC uses a serial port of the server. If the BMC wants to use the serial port and the voltage level of the GPIO pin is at a high level, the serial port can be used by the BMC. If the BMC wants to use the serial port but the voltage level of the GPIO pin is not at the high level, the serial port is be used by the BIOS. If the BIOS has been initialized, the voltage level of the GPIO pin is pulled up.

Abstract: A electronic device includes a bus, two electronic elements connected to the bus, and a controller. Each of the two electronic element is designated a logic unit number (LUN) and a first temporary buffer identified by the LUN for storing messages transmitted from or to the corresponding electronic element by the bus. The controller for obtaining the LUN of the message transmitted from/to the at least two electronic element, determining the temporary buffer which the message is stored according to the obtained LUN, storing the message to the determined temporary buffer, and transmitting the message stored in the temporary buffer to the corresponding electronic element or processing the message stored in the temporary buffer.

Abstract: A electronic device includes a bus, two electronic elements connected to the bus, and a controller. Each of the two electronic element is designated a logic unit number (LUN) and a first temporary buffer identified by the LUN for storing messages transmitted from or to the corresponding electronic element by the bus. The controller for obtaining the LUN of the message transmitted from/to the at least two electronic element, determining the temporary buffer which the message is stored according to the obtained LUN, storing the message to the determined temporary buffer, and transmitting the message stored in the temporary buffer to the corresponding electronic element or processing the message stored in the temporary buffer.

Abstract: The present disclosure provides an electronic device. The electronic device includes a UART connected to at least one external input device. The UART includes a number of registers. The electronic device further includes a BMC and a BIOS. The BMC is connected to the UART to initialize the registers and is further connected to a south bridge for transmitting a restarting signal to the south bridge when the BMC is restarted. The BIOS is connected to the UART for storing input from the input device, and is connected to the south bridge for detecting whether the BMC generates the restarting signal, to enable or disable the registers to store or not to store the input from the external input device.

Abstract: An electronic device includes a general purpose input output (GPIO) expander and a baseboard management controller (BMC). The GPIO expander includes a number of GPIO interfaces and a gathering interface connected to the GPIO interfaces. The BMC includes a public interface and a scanning interface connected to the gathering interface. Each element is connected to the public interface and a different one of the GPIO interfaces. The BMC periodically detects whether there is a signal input from the public interface, scans the GPIO interfaces when there is a signal input from the public interface to determine a GPIO interface with a logic high level, an element connected to the GPIO interface, and a signal input from the element, and records an event including the GPIO interface, the element connected to the GPIO interface, and the signal, and stores the event.

Abstract: A method for clearing data stored in a complementary metal-oxide semiconductor (CMOS) chip of a computing device. The computing device further includes a CMOS jumper connected to the CMOS chip, and a general purpose input/output (GPIO) interface connected to the CMOS jumper. The method configures a GPIO pin of the GPIO interface as an output port, controls the GPIO pin to generate a GPIO signal with a high level, and outputs the GPIO signal with the high level to the CMOS jumper. After receiving a command of clearing data stored in the CMOS chip, the method pulls down the GPIO signal from the high level to a low level, to clear the data stored in the CMOS chip.

Abstract: A baseboard management controller (BMC) of a server includes a general purpose input output (GPIO) pin. An voltage level of the GPIO level determines if a BIOS of the server or the BMC uses a serial port of the server. If the BMC wants to use the serial port and the voltage level of the GPIO pin is at a high level, the serial port can be used by the BMC. If the BMC wants to use the serial port but the voltage level of the GPIO pin is not at the high level , the serial port is be used by the BIOS. If the BIOS has been initialized, the voltage level of the GPIO pin is pulled up.

Abstract: A method for clearing data stored in a complementary metal-oxide semiconductor (CMOS) chip of a computing device. The computing device further includes a CMOS jumper connected to the CMOS chip, and a general purpose input/output (GPIO) interface connected to the CMOS jumper. The method configures a GPIO pin of the GPIO interface as an output port, controls the GPIO pin to generate a GPIO signal with a high level, and outputs the GPIO signal with the high level to the CMOS jumper. After receiving a command of clearing data stored in the CMOS chip, the method pulls down the GPIO signal from the high level to a low level, to clear the data stored in the CMOS chip.