Abstract: A containment apparatus for battery tray rack includes a pressing module, a securing module, and a controller. In response to that the containment apparatus is to form the containment on the battery tray rack, the controller controls the pressing module to apply a compressive force, so that the battery tray rack withstands a clamping pressure, and the controller controls the securing module to lock the battery tray rack to maintain the clamping pressure. In response to that the containment apparatus is to release the containment from the battery tray rack, the controller controls the pressing module to apply the compressive force, and the controller controls the securing module to unlock the battery tray rack, and then the controller controls the pressing module to cancel the compressive force.

Abstract: The present invention discloses a detection device and a probe module thereof, wherein an electrical connection path between a battery detection frame and a battery under test is provided via the probe module. The probe module includes a base, a first polarity plate, a second polarity plate, a first upper connection group, a second upper connection group, a first lower connection member and a second lower connection member. Via the first polarity plate, the first upper connection group is correspondingly coupled to the battery detection frame, and the first lower connection member is correspondingly coupled to the battery under test. Via the second polarity plate, the second upper connection group is correspondingly coupled to the battery detection frame, and the second lower connection member is correspondingly coupled to the battery under test. Thus, it is not necessary to process a cable having been fixed on the battery detection frame when the probe module is replaced.

Abstract: A display device is provided, including a panel, a plurality of first light sources, and a plurality of second light sources. The panel includes a first display area and a second display area. The first light sources correspond to the first display area. The second light sources correspond to the second display area. The color of the second light sources is different from the color of the first light sources. When the brightness of the second light sources is increased, the brightness of the first light sources decreases, and when the brightness of the first light sources is increased, the brightness of the second light sources decreases.

Abstract: A manufacturing method of a semiconductor device includes the following steps. A plurality of select gates are formed on a memory region of a semiconductor substrate. Two charge storage structures are formed between two adjacent select gates. A source region is formed in the semiconductor substrate, and the source region is formed between the two adjacent select gates. An insulation block is formed between the two charge storage structures and formed on the source region. A memory gate is formed on the insulation block, and the memory gate is connected to the two charge storage structures.

Abstract: A display device is provided, including a panel, a plurality of first light sources, and a plurality of second light sources. The panel includes a first display area and a second display area. The first light sources correspond to the first display area. The second light sources correspond to the second display area. The color of the second light sources is different from the color of the first light sources. When the brightness of the second light sources is increased, the brightness of the first light sources decreases, and when the brightness of the first light sources is increased, the brightness of the second light sources decreases.

Abstract: The non-volatile memory cell includes a coupling device and a first select transistor. The coupling device is formed in a first conductivity region. The first select transistor is serially connected to a first floating gate transistor and a second select transistor, all formed in a second conductivity region. An electrode of the coupling device and a gate of the first floating gate transistor are a monolithically formed floating gate; wherein the first conductivity region and the second conductivity region are formed in a third conductivity region; wherein the first conductivity region, the second conductivity region, and the third conductivity region are wells.

Abstract: The non-volatile memory cell includes a coupling device and a first select transistor. The coupling device is formed in a first conductivity region. The first select transistor is serially connected to a first floating gate transistor and a second select transistor, all formed in a second conductivity region. An electrode of the coupling device and a gate of the first floating gate transistor are a monolithically formed floating gate; wherein the first conductivity region and the second conductivity region are formed in a third conductivity region; wherein the first conductivity region, the second conductivity region, and the third conductivity region are wells.