Patents by Inventor Wen-Fang Liu
Wen-Fang Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10813231Abstract: The present disclosure relates to a method for manufacturing a circuit board. The method for manufacturing the circuit board includes forming a patterned first dielectric layer on a substrate; forming an adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the adhesive layer; and patterning the second dielectric layer and the adhesive layer.Type: GrantFiled: October 3, 2019Date of Patent: October 20, 2020Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Po-Hsuan Liao, Wen-Fang Liu
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Publication number: 20200037455Abstract: The present disclosure relates to a method for manufacturing a circuit board. The method for manufacturing the circuit board includes forming a patterned first dielectric layer on a substrate; forming an adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the adhesive layer; and patterning the second dielectric layer and the adhesive layer.Type: ApplicationFiled: October 3, 2019Publication date: January 30, 2020Inventors: Po-Hsuan LIAO, Wen-Fang LIU
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Patent number: 10497847Abstract: A heat dissipation substrate structure includes a multilayer circuit board including a core board and build-up boards, a heat conduction layer, a cavity structure, bonding pads, and vias. The heat conduction layer is disposed within the core board, or on a surface of the core board, or on a surface of one of the build-up boards. The cavity structure is in the multilayer circuit board with respect to the heat conduction layer and exposes a first surface of the heat conduction layer. The bonding pads are on the surface of the multilayer circuit board at a side of a second surface of the heat conduction layer. The portions of the vias are connected to portions of the bonding pads and the heat conduction layer. Accordingly, heat flow can be distributed via a heat dissipation path from the bonding pads through the vias to the heat conduction layer.Type: GrantFiled: November 30, 2017Date of Patent: December 3, 2019Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Patent number: 10477701Abstract: A circuit board includes a substrate, a first dielectric layer, an adhesive layer, a second dielectric layer, and a conductive line. The first dielectric layer is disposed on the substrate. The adhesive layer is bonded to the first dielectric layer and has at least one through hole. The through hole has an inner wall. The second dielectric layer is disposed on the adhesive layer and has a second through hole communicated with the first through hole. The conductive line is located in the second through hole of the second dielectric layer and is in contact with the inner wall of the adhesive layer.Type: GrantFiled: December 11, 2017Date of Patent: November 12, 2019Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Po-Hsuan Liao, Wen-Fang Liu
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Patent number: 10356901Abstract: A manufacturing method of a circuit board structure includes the following steps: providing an inner circuit structure which includes a core layer; performing a build-up process to laminate a first build-up circuit structure on a first patterned circuit layer of the inner circuit structure, wherein the first build-up circuit structure includes an inner dielectric layer, and the inner dielectric layer directly covers an upper surface of the core layer and the first patterned circuit layer; removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively far away from the inner circuit structure to a portion of the inner dielectric layer; performing a sandblasting process on a first inner surface of the inner dielectric layer exposed by the opening to at least remove the portion of the inner dielectric layer exposed by the opening.Type: GrantFiled: June 14, 2018Date of Patent: July 16, 2019Assignee: Unimicron Technology Corp.Inventors: Ming-Hao Wu, Wen-Fang Liu
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Publication number: 20190124778Abstract: A circuit board includes a substrate, a first dielectric layer, an adhesive layer, a second dielectric layer, and a conductive line. The first dielectric layer is disposed on the substrate. The adhesive layer is bonded to the first dielectric layer and has at least one through hole. The through hole has an inner wall. The second dielectric layer is disposed on the adhesive layer and has a second through hole communicated with the first through hole. The conductive line is located in the second through hole of the second dielectric layer and is in contact with the inner wall of the adhesive layer.Type: ApplicationFiled: December 11, 2017Publication date: April 25, 2019Inventors: Po-Hsuan LIAO, Wen-Fang LIU
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Publication number: 20190067543Abstract: A heat dissipation substrate structure includes a multilayer circuit board including a core board and build-up boards, a heat conduction layer, a cavity structure, bonding pads, and vias. The heat conduction layer is disposed within the core board, or on a surface of the core board, or on a surface of one of the build-up boards. The cavity structure is in the multilayer circuit board with respect to the heat conduction layer and exposes a first surface of the heat conduction layer. The bonding pads are on the surface of the multilayer circuit board at a side of a second surface of the heat conduction layer. The portions of the vias are connected to portions of the bonding pads and the heat conduction layer. Accordingly, heat flow can be distributed via a heat dissipation path from the bonding pads through the vias to the heat conduction layer.Type: ApplicationFiled: November 30, 2017Publication date: February 28, 2019Applicant: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Publication number: 20180368263Abstract: A chip package circuit board module including a circuit board and at least one original chip is provided. The circuit board includes at least one first pad, at least one second pad and at least one substitute pad. The at least one second pad is located besides the at least one first pad and separated from the at least one first pad. The at least one substitute pad is adjacent to the at least one second pad and separated from the at least one first pad and the at least one second pad. The at least one original chip is connected to the at least one first pad and at least one the second pad, respectively. A total width of a portion corresponding to each of the at least one second pad and a portion corresponding to the substitute pad adjacent to the second pad of the first pad is greater than or equal to twice a width of the original chip.Type: ApplicationFiled: June 14, 2017Publication date: December 20, 2018Applicant: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li, Chien-Tsai Li
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Patent number: 10159151Abstract: A chip package circuit board module including a circuit board and at least one original chip is provided. The circuit board includes at least one first pad, at least one second pad and at least one substitute pad. The at least one second pad is located besides the at least one first pad and separated from the at least one first pad. The at least one substitute pad is adjacent to the at least one second pad and separated from the at least one first pad and the at least one second pad. The at least one original chip is connected to the at least one first pad and at least one the second pad, respectively. A total width of a portion corresponding to each of the at least one second pad and a portion corresponding to the substitute pad adjacent to the second pad of the first pad is greater than or equal to twice a width of the original chip.Type: GrantFiled: June 14, 2017Date of Patent: December 18, 2018Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li, Chien-Tsai Li
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Publication number: 20180295723Abstract: A manufacturing method of a circuit board structure includes the following steps: providing an inner circuit structure which includes a core layer; performing a build-up process to laminate a first build-up circuit structure on a first patterned circuit layer of the inner circuit structure, wherein the first build-up circuit structure includes an inner dielectric layer, and the inner dielectric layer directly covers an upper surface of the core layer and the first patterned circuit layer; removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively far away from the inner circuit structure to a portion of the inner dielectric layer; performing a sandblasting process on a first inner surface of the inner dielectric layer exposed by the opening to at least remove the portion of the inner dielectric layer exposed by the opening.Type: ApplicationFiled: June 14, 2018Publication date: October 11, 2018Applicant: Unimicron Technology Corp.Inventors: Ming-Hao Wu, Wen-Fang Liu
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Patent number: 10056356Abstract: A chip package circuit board module includes a circuit board and an original chip. The circuit board includes a first pad and a second pad disposed besides the first pad and separated from the first pad. The original chip is connected to the first pad and the second pad. A width of the original chip is W1, a total width of the first pad is P1, and a total width of the second pad is P2. The total width P1 of the first pad is larger than twice of the width W1 of the original chip, and the total width P2 of the second pad is larger than twice of the width W1 of the original chip.Type: GrantFiled: May 3, 2017Date of Patent: August 21, 2018Assignee: Unimicron Technology Corp.Inventors: Wen-Fang Liu, Shao-Chien Lee, Chen-Wei Tseng, Zong-Hua Li
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Patent number: 10039184Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface opposite to each other, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive via connecting the first and the second patterned circuit layers. The first build-up circuit structure is disposed on the upper surface of the core layer and covers the first patterned circuit layer, wherein the first build-up circuit structure at least has a cavity, the cavity exposes a portion of the first patterned circuit layer and a cross-sectional profile of an edge of a top surface of the portion of the first patterned circuit layer exposed by the cavity is a curved surface.Type: GrantFiled: February 8, 2017Date of Patent: July 31, 2018Assignee: Unimicron Technology Corp.Inventors: Ming-Hao Wu, Wen-Fang Liu
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Publication number: 20180153036Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface opposite to each other, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive via connecting the first and the second patterned circuit layers. The first build-up circuit structure is disposed on the upper surface of the core layer and covers the first patterned circuit layer, wherein the first build-up circuit structure at least has a cavity, the cavity exposes a portion of the first patterned circuit layer and a cross-sectional profile of an edge of a top surface of the portion of the first patterned circuit layer exposed by the cavity is a curved surface.Type: ApplicationFiled: February 8, 2017Publication date: May 31, 2018Applicant: Unimicron Technology Corp.Inventors: Ming-Hao Wu, Wen-Fang Liu
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Patent number: 8979372Abstract: A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n1 and n2, and |n1?n2|/n1<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer.Type: GrantFiled: February 26, 2013Date of Patent: March 17, 2015Assignee: Unimicron Technology Corp.Inventors: Pei-Chang Huang, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20140119688Abstract: A circuit board, a manufacturing method thereof, and an electro-optic apparatus having the circuit board are provided. The circuit board includes a substrate including a first dielectric layer and a first circuit layer disposed thereon, a waveguide layer disposed on a portion of the substrate, a second dielectric layer, a convex structure and a second circuit layer. The second dielectric layer is disposed on the substrate and the waveguide layer. The second dielectric layer has an opening exposing the sidewall of the waveguide layer and a portion of the first circuit layer. The convex structure is disposed on the sidewall of the waveguide layer. The convex structure and the waveguide layer respectively have refractive index n1 and n2, and |n1-n21|n1<1%. The surface roughness of the convex structure is less than that of the sidewall of the waveguide layer. The second circuit layer is disposed on the second dielectric layer.Type: ApplicationFiled: February 26, 2013Publication date: May 1, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Pei-Chang Huang, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20140099432Abstract: A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof.Type: ApplicationFiled: December 27, 2012Publication date: April 10, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20140069574Abstract: A manufacturing method of a circuit board is provided. In the manufacturing method, an electrically insulating layer and at least one electrically insulating material are formed on a plane of a thermally conductive plate, and a metal pattern layer located on the electrically insulating layer is formed. The electrically insulating layer partially covers the plane, and the electrically insulating material covers the plane where is not covered by the electrically insulating layer. The electrically insulating material touches the thermally conductive plate. A thermal conductivity of the electrically insulating material is larger than that of the electrically insulating layer.Type: ApplicationFiled: November 12, 2013Publication date: March 13, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: TZYY JANG TSENG, CHANG MING LEE, WEN FANG LIU, CHENG PO YU
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Patent number: 8598463Abstract: A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.Type: GrantFiled: March 17, 2011Date of Patent: December 3, 2013Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Patent number: 8318411Abstract: Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.Type: GrantFiled: July 15, 2010Date of Patent: November 27, 2012Assignee: Unimicron Technology Corp.Inventors: Chang-Ming Lee, Wen-Fang Liu, Shih-Jung Huang, Ling-Kai Su
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Patent number: 8294042Abstract: A method of manufacturing a connector is provided. Firstly, a substrate having a first surface, a second surface opposite to the first surface and a through hole is provided. Next, a first conductive layer covering the inside wall of the through hole is formed on the substrate. Then, a filler is filled in the through hole to form a filler post. Next, a conductive elastic cantilever is formed over the first surface and electrically connected to the first conductive layer. Then, a gold layer is formed on the conductive elastic cantilever and over the first surface. A solder ball electrically connected to the first conductive layer is formed over the second surface.Type: GrantFiled: July 27, 2010Date of Patent: October 23, 2012Assignee: Unimicron Technology Corp.Inventors: Chang-Ming Lee, Wen-Fang Liu, Shih-Jung Huang, Ling-Kai Su