Patents by Inventor Wen-Fu Chou

Wen-Fu Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11812554
    Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: November 7, 2023
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 11581283
    Abstract: A flip chip package includes a circuit board, a chip and a solder layer. The chip is mounted on an inner bonding area of the circuit board. The solder layer is located between the circuit board and the chip for bonding bumps to inner leads and a T-shaped circuit unit is on the inner bonding area. The T-shaped circuit unit has a main part, a connection part, and a branch part. The connection part is connected to the main and branch parts, respectively. The main part extends along a lateral direction and the branch part extends outwardly along a longitudinal direction. The connection part is narrower than the main part in width so as to inhibit solder shorts caused by solder overflow on the branch part.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: February 14, 2023
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 11350518
    Abstract: In a method of heat sink attachment, a heat-sink tape includes a plurality of heat sinks and a flexible carrier, and a holder is provided to allow the heat sinks on the moving heat-sink tape to peel from the flexible carrier and attach to a heat-sink mounting area of a moving circuit tape automatically and successively.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: May 31, 2022
    Assignee: Chipbond Technology Corporation
    Inventors: Chia-Sung Lin, Huan-Kai Chou, Chia-Hsin Yen, Wen-Fu Chou
  • Patent number: 11322437
    Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 3, 2022
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 11309238
    Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 19, 2022
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20220104354
    Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.
    Type: Application
    Filed: April 12, 2021
    Publication date: March 31, 2022
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20220037238
    Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.
    Type: Application
    Filed: April 12, 2021
    Publication date: February 3, 2022
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20210265255
    Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.
    Type: Application
    Filed: September 30, 2020
    Publication date: August 26, 2021
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20210257287
    Abstract: A chip package includes a circuit board, a chip and an underfill. The circuit board includes a substrate, first circuit lines and second circuit lines. Each of the first circuit lines includes an inner lead and a first line fragment that are disposed on a chip mounting area and an underfill covering area of the substrate, respectively. The second circuit lines are disposed on the chip mounting area and not located between the adjacent inner leads so as to form a wider space between the adjacent first line fragments. The wider space enables the underfill to flow to between the circuit board and the chip and prevents air bubbles from being embedded in the underfill filled between the circuit board and the chip.
    Type: Application
    Filed: August 6, 2020
    Publication date: August 19, 2021
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20210227679
    Abstract: In a method of heat sink attachment, a heat-sink tape includes a plurality of heat sinks and a flexible carrier, and a holder is provided to allow the heat sinks on the moving heat-sink tape to peel from the flexible carrier and attach to a heat-sink mounting area of a moving circuit tape automatically and successively.
    Type: Application
    Filed: July 13, 2020
    Publication date: July 22, 2021
    Inventors: Chia-Sung Lin, Huan-Kai Chou, Chia-Hsin Yen, Wen-Fu Chou
  • Publication number: 20210204401
    Abstract: A flexible circuit board includes a flexible substrate and a stiffening structure, a stiffening area is defined on a bottom surface of the flexible substrate, and the stiffening structure includes a first stiffener and a second stiffener. The first stiffener is disposed on the stiffening area of the bottom surface and the second stiffener is disposed on the first stiffener such that the first stiffener is located between the flexible substrate and the second stiffener. The flexible substrate is protected from punch damage caused by stress concentrations because a cutting line of the flexible substrate only passes through the first stiffener.
    Type: Application
    Filed: June 29, 2020
    Publication date: July 1, 2021
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Publication number: 20210202422
    Abstract: A flip chip interconnection includes a circuit board, a chip and a solder layer. The chip is mounted on an inner bonding area of the circuit board, the solder layer is located between the circuit board and the chip for bonding bumps to inner leads and a T-shaped circuit unit on the inner bonding area. The T-shaped circuit unit has a main part, a connection part and a branch part, the connection part is connected to the main and branch parts, respectively. The main part extends along a lateral direction and the branch part extends outwardly along a longitudinal direction. The connection part is narrower than the main part in width so as to prevent solder short caused by solder overflow on the branch part.
    Type: Application
    Filed: June 24, 2020
    Publication date: July 1, 2021
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 10999928
    Abstract: A circuit board electrically connected to a chip includes a substrate and a circuit layer. A first conductive line of the circuit layer includes a main line and a branch lead connected with each other. The branch lead provided to increase lead quantity for bonding with the chip includes an extension part and a bonding part which is used for bonding a bump of the chip. During thermal compression, gaps existing between the extension part and the main line and between the bonding part and the main line can prevent solder on the main line from flowing toward the bump and overflowing from the branch lead.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: May 4, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 10993319
    Abstract: A chip package includes a circuit board, a chip and an underfill. A solder resist layer formed on the circuit board is modified in edge profile so as to reduce required amount of the underfill. The fewer underfill is still enough to be filled between the circuit board and the chip, and still can cover circuit lines that are not covered by the solder resist layer to protect the circuit lines from oxidation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 27, 2021
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Yu-Chen Ma, Hsin-Hao Huang, Wen-Fu Chou, Gwo-Shyan Sheu
  • Patent number: 8384492
    Abstract: A connector comprises a coaxial connector and a metallic plate. The coaxial connector has an outer conductor, a dielectric material, a mounting wall, and a center conductor. The space between the two conductors is filled with the dielectric material. The center conductor is extended from the inside of the coaxial connector to the other side of the mounting wall. The metallic plate has a through hole and is attached to the mounting wall of the coaxial connector. The outside center conductor of the coaxial connector is placed within the through hole. Hence, the connector improves the transmission passband of the transition between a coaxial line and a microstrip line at high frequencies.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: February 26, 2013
    Assignee: National Taipei University of Technology
    Inventors: Jui-Ching Cheng, Eric S. Li, Wen-Fu Chou, Kuan-Lin Huang
  • Publication number: 20120056696
    Abstract: A connector comprises a coaxial connector and a metallic plate. The coaxial connector has an outer conductor, a dielectric material, a mounting wall, and a center conductor. The space between the two conductors is filled with the dielectric material. The center conductor is extended from the inside of the coaxial connector to the other side of the mounting wall. The metallic plate has a through hole and is attached to the mounting wall of the coaxial connector. The outside center conductor of the coaxial connector is placed within the through hole. Hence, the connector improves the transmission passband of the transition between a coaxial line and a microstrip line at high frequencies.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 8, 2012
    Applicant: NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: JUI-CHING CHENG, ERIC S. LI, WEN-FU CHOU, KUAN-LIN HUANG