Patents by Inventor Wen-Ho Hsiao

Wen-Ho Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8314759
    Abstract: A method and an apparatus for displaying an image on a display unit and controlling a backlight module which irradiates the display unit are disclosed. The method includes: processing the image signal and generating a driving signal to drive the display unit; displaying contents of the image signal; analyzing luminance values of the image signal to generate a luminance analysis result; and generating a control signal to control the backlight module according to the luminance analysis result.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: November 20, 2012
    Assignee: MStar Semiconductor, Inc.
    Inventors: Yi-Liang Lu, Wen-Ho Hsiao, Shu-Yueh Ko
  • Publication number: 20080062117
    Abstract: A method and an apparatus for displaying an image on a display unit and controlling a backlight module which irradiates the display unit are disclosed. The method includes: processing the image signal and generating a driving signal to drive the display unit; displaying contents of the image signal; analyzing luminance values of the image signal to generate a luminance analysis result; and generating a control signal to control the backlight module according to the luminance analysis result.
    Type: Application
    Filed: December 28, 2006
    Publication date: March 13, 2008
    Inventors: Yi-Liang Lu, Wen-Ho Hsiao, Shu-Yueh Ko
  • Patent number: 7202870
    Abstract: The present invention provides a display controller for scaling an input source image. The display controller dynamically adjusts the output clock so line buffer requirement is reduced to a minimum to balance input and output image timing for image scaling or non-scaling to destination devices. The present invention supports up-scaling and down-scaling or bypass. The blocks of the line buffer operates in a continuous and cyclical manner according to the status signal generated by the line buffer status detector and the output clock. As a result, any buffer overrun or underrun condition will be immediately corrected by the timing and therefore the number of blocks of line buffer are greatly reduced.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: April 10, 2007
    Assignee: MStar Semiconductor, Inc.
    Inventors: Jiunn-Kuang Chen, Wen-Ho Hsiao, Hsu-Lin FanChiang
  • Patent number: 7034812
    Abstract: A method and apparatus for automatically tuning the output line rate thereof and a display controller provided with the same. The display controller of the present invention provides a display controller having a line buffer, an input means, an output means, a status detector, and an auto-tune control means. The input means is employed to write line data into the line buffer at an input line rate, and the output means is employed to read the written line data from the line buffer at an output line rate. The status detector is coupled to the input means and the output means for generating a status signal indicating whether the input line rate and the output line rate are unbalanced. The auto-tune control means is used to adjust the output line rate in response to the status signal so as to balance the input line rate and the output line rate.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: April 25, 2006
    Assignee: MStar Semiconductor Inc.
    Inventors: Jiunn-Kuang Chen, Wen-Ho Hsiao, Hsu-Lin FanChiang
  • Publication number: 20030184678
    Abstract: The present invention provides a display controller for scaling an input source image. The display controller dynamically adjusts the output clock so line buffer requirement is reduced to a minimum to balance input and output image timing for image scaling or non-scaling to destination devices. The present invention supports up-scaling and down-scaling or bypass. The blocks of the line buffer operates in a continuous and cyclical manner according to the status signal generated by the line buffer status detector and the output clock. As a result, any buffer overrun or underrun condition will be immediately corrected by the timing and therefore the number of blocks of line buffer are greatly reduced.
    Type: Application
    Filed: November 12, 2002
    Publication date: October 2, 2003
    Inventors: Jiunn-Kuang Chen, Wen-Ho Hsiao, Hsu-Lin FanChiang
  • Publication number: 20030184532
    Abstract: A method and apparatus for automatically tuning the output line rate thereof and a display controller provided with the same. The display controller of the present invention provides a display controller having a line buffer, an input means, an output means, a status detector, and an auto-tune control means. The input means is employed to write line data into the line buffer at an input line rate, and the output means is employed to read the written line data from the line buffer at an output line rate. The status detector is coupled to the input means and the output means for generating a status signal indicating whether the input line rate and the output line rate are unbalanced. The auto-tune control means is used to adjust the output line rate in response to the status signal so as to balance the input line rate and the output line rate.
    Type: Application
    Filed: November 12, 2002
    Publication date: October 2, 2003
    Inventors: Jiunn-Kuang Chen, Wen-Ho Hsiao, Hsu-Lin FanChiang