Patents by Inventor Wen-Hsiang Tang

Wen-Hsiang Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6642150
    Abstract: A new method for detecting blind holes in the contact layer of a multi-chip semiconductor test wafer makes use of the fact that if the hole is not a blind hole, a subsequent etch step extends the hole a predetermined distance into the layer immediately underlying the contact layer. After a predetermined number of holes have been etched through the contact layer and for a predetermined distance into the layer underlying the contact layer, the contact layer is stripped to expose the holes in the underlying layer. These holes are scanned optically by a commercial apparatus that ordinarily detects wafer defects that resemble the holes. The missing holes are detected by comparing the holes of different chips on the test wafer. The test is particularly useful with a high density plasma etch because these holes typically have a very small diameter in relation to the thickness of the contact layer.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: November 4, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chuan-Chieh Huang, Wen-Hsiang Tang, Ming-Shuo Yen, Chiang-Jen Peng, Pei-Hung Chen
  • Patent number: 6562696
    Abstract: A method for forming a shallow trench isolation feature to avoid acidic etching of trench sidewalls including providing a semiconductor substrate having an overlying silicon nitride layer; photolithographically patterning the silicon nitride layer to expose a portion of the silicon nitride layer; anisotropically etching through a thickness of the portion of the silicon nitride layer to form a hardmask opening exposing a portion of the semiconductor substrate; blanket depositing a polymer layer according to a plasma deposition process including at least partially covering the sidewalls and bottom portion of the hardmask opening; and, anisotropically etching a trench opening through a thickness portion of the semiconductor substrate according to the hardmask opening.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 13, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Jen-Tian Hsu, Wen-Hsiang Tang
  • Patent number: 6267121
    Abstract: An improved seasoning process for a plasma etching chamber is described. This has been achieved by increasing the RF power to both the wafer and the walls of the chamber during seasoning. Additionally, the gas that is used is at a pressure of about 10 mTorr and has the following composition: chlorine about 90% and oxygen about 10%. By observing the optical emission spectrum during seasoning (notably lines due to the SiClx species) it is confirmed that, under these conditions, seasoning is completed by using only a single wafer for about 100 seconds.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: July 31, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Hao Huang, Ming-Shuo Yen, Shih-Fang Chen, Wen-Hsiang Tang, Pei-Hung Chen
  • Patent number: 6214739
    Abstract: A method of etching a metal layer on a semiconductor device using an in-situ plasma cleaning step following the metal etch. The process begins by forming a metal layer over a semiconductor substrate. A photoresist mask is formed over the metal layer. The metal layer is patterned by dry etching unmasked areas of the metal layer in a plasma etching chamber. Polymer formations are formed during etching on the metal sidewalls and the walls of the plasma etching chamber. A novel plasma cleaning step is performed in-situ to partially remove the photoresist and to soften and partially remove the polymer formations formed on the metal sidewalls during etching. The plasma cleaning also partially removes polymer from the walls of the plasma etching chamber. The substrate is removed from the plasma etching chamber, and placed in an ashing chamber, and the remaining photoresist is removed. The substrate is removed from the ashing chamber and the remaining polymer formations are removed in a wet etch process.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: April 10, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Hao Huang, Wen-Hsiang Tang, Pei-Hung Chen
  • Patent number: 6156485
    Abstract: A method of high aspect ratio etching (HARE) of metal layers in quarter micron technology is disclosed. High aspect ratio patterns are encountered because of the shrinking lateral dimensions over the constant remaining thickness of the features of ultra large scaled integrated chips. HARE is accomplished by employing a tungsten W-hardmask with a high selectivity of 10:1 with respect to the immediately underlying aluminum-copper metal layer. In order to protect the lithographic integrity, overlying organic BARC is used to prevent reflections from the W-hardmask as well as from the underlying metal layer. The lithographic resolution is further improved by using a thin photoresist layer in combination with the high selectivity hardmask. In this manner, the tradeoff that normally has to be made between a high resolution process and a reliable metal etch is circumvented.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: December 5, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Wen-Hsiang Tang, Yi-Fei Wang, Chih-Shen Hung, Cheng-Hao Huang
  • Patent number: 6063709
    Abstract: A process for etching back SOG during planarization is described. A mix of CHF.sub.3 and CF.sub.4 in an argon carrier gas is used, with the latter having a flow rate of about 175 SCCM. An RF discharge is initiated for about 10 seconds during which time etching occurs. The system is then cleared of all reactive gases by a brief pumpdown to base pressure. In a key feature of the invention, argon alone is now admitted to the reaction chamber at a greater than normal flow rate of about 273 SCCM. This high flow rate is maintained for about 40 seconds (including about 10 seconds to reach an equilibrium pressure of about 225 mtorr) following which the system is pumped out again and the process is terminated. If this procedure is followed, no polymeric residue is generated at the surface of any exposed titanium nitride.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: May 16, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kang-Min Kuo, Wen-Hsiang Tang, Su-Ying Su, Chi-Ming Wu