Abstract: A transistor structure is provided to reduce the sizes of a semiconductor device applying the transistor structure and maximize the performance of the semiconductor device, wherein the transistor structure comprises a substrate, a first semiconductor layer, a second semiconductor layer and a first gate structure. The first semiconductor layer that is formed on the substrate has a first space by which the first semiconductor layer is divided into a first region and a second region. The second semiconductor layer that is formed on the substrate and stacked on the first semiconductor layer comprises a first source region stacked on the first region, a first drain region stacked on the second region, a first floating structure crossing the first space and connected between the first source region and the first drain region. The first gate structure surrounds the first floating structure.