Patents by Inventor WEN-HSING HUANG

WEN-HSING HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090210
    Abstract: A semiconductor device includes first nanostructures vertically separated from one another, a first gate structure wrapping around each of the first nanostructures, and second nanostructures vertically separated from one another. The semiconductor device also includes a second gate structure wrapping around the second nanostructures, a first drain/source structure coupled to a first end of the first nanostructures, a second drain/source structure coupled to both of a second end of the first nanostructures and a first end of the second nanostructures, and a third drain/source structure coupled to a second end of the second nanostructures. The first drain/source structure has a first doping type, the second and third drain/source structures have a second doping type, and the first doping type is opposite to the second doping type.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Sheng Chang, Chia-En Huang, Chun Chung Su, Wen-Hsing Hsieh
  • Patent number: 11869817
    Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: January 9, 2024
    Assignee: EXCELLENCE OPTO. INC.
    Inventors: Fu-Bang Chen, Chih-Chiang Chang, Chang-Ching Huang, Chun-Ming Lai, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
  • Patent number: 11869816
    Abstract: A package substrate comprises first, second and third electrical test contacts, wherein the package substrate is provided with an upper element plane and a lower SMD electrode plane on two sides. The side edge of the upper element plane is provided with first and second electrodes of the main element and first and second electrodes of the secondary element. The main element of LED chip is electrically connected between the first and second electrodes of the main element, a parallel circuit secondary element is electrically connected between the first and second electrodes of the secondary element. The electrical characteristics of the main element of LED chip and the parallel circuit secondary element are measured through the first, second, and third electrical test contacts when electrically connected.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: January 9, 2024
    Assignee: EXCELLENCE OPTO. INC.
    Inventors: Fu-Bang Chen, Chih-Chiang Chang, Chang-Ching Huang, Chun-Ming Lai, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
  • Patent number: 11830862
    Abstract: The invention provides a chip structure of a micro light-emitting diode display, comprising a package substrate, at least one light-emitting diode (LED) element, at least one metal oxide semiconductor field effect transistor (MOSFET), and a connection line. The LED element and the MOSFET are positioned on the package substrate, and each MOSFET comprises a source connected with the input voltage in common, a gate connected with a main control circuit, and a drain. An end of the LED element is connected with the drain of the MOSFET through the connection line, and the other end of the LED element is independently connected with a source drive circuit. Therefore, the MOSFET is provided on the package substrate and integrated in a chip structure, so as to achieve a better heat dissipation effect and requirements of high density and brightness.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: November 28, 2023
    Assignee: EXCELLENCE OPTO. INC.
    Inventors: Kuo-Hsin Huang, Yung-Hsiang Chao, Wen-Hsing Huang, Chang-Ching Huang, Tai-Hui Liu
  • Publication number: 20230023295
    Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 26, 2023
    Inventors: Fu-Bang CHEN, Chih-Chiang CHANG, Chang-Ching HUANG, Chun-Ming LAI, Wen-Hsing HUANG, Tzeng-Guang TSAI, Kuo-Hsin HUANG
  • Publication number: 20230021896
    Abstract: A package substrate comprises first, second and third electrical test contacts, wherein the package substrate is provided with an upper element plane and a lower SMD electrode plane on two sides. The side edge of the upper element plane is provided with first and second electrodes of the main element and first and second electrodes of the secondary element. The main element of LED chip is electrically connected between the first and second electrodes of the main element, a parallel circuit secondary element is electrically connected between the first and second electrodes of the secondary element. The electrical characteristics of the main element of LED chip and the parallel circuit secondary element are measured through the first, second, and third electrical test contacts when electrically connected.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 26, 2023
    Inventors: Fu-Bang CHEN, Chih-Chiang CHANG, Chang-Ching HUANG, Chun-Ming LAI, Wen-Hsing HUANG, Tzeng-Guang TSAI, Kuo-Hsin HUANG
  • Publication number: 20220149023
    Abstract: The invention provides a chip structure of a micro light-emitting diode display, comprising a package substrate, at least one light-emitting diode (LED) element, at least one metal oxide semiconductor field effect transistor (MOSFET), and a connection line. The LED element and the MOSFET are positioned on the package substrate, and each MOSFET comprises a source connected with the input voltage in common, a gate connected with a main control circuit, and a drain. An end of the LED element is connected with the drain of the MOSFET through the connection line, and the other end of the LED element is independently connected with a source drive circuit. Therefore, the MOSFET is provided on the package substrate and integrated in a chip structure, so as to achieve a better heat dissipation effect and requirements of high density and brightness.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Kuo-Hsin HUANG, Yung-Hsiang CHAO, Wen-Hsing HUANG, Chang-Ching HUANG, Tai-Hui LIU
  • Patent number: 11248758
    Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 15, 2022
    Assignee: EXCELLENCE OPTOELECTRONICS INC.
    Inventors: Wei-Po Shen, Chun-Ming Lai, Chih-Chiang Chang, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
  • Publication number: 20220018503
    Abstract: A surface light source LED device includes a circuit board, at least one power input and at least two LED bar elements, the at least two LED bar elements are arranged in a staggered manner, and each of the LED bar elements includes a plurality of LED bars arranged linearly on the circuit board. Each of the LED bars has a straight strip structure and has a plurality of LED dies of the same type provided inside. The plurality of LED dies is arranged linearly at equal intervals.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 20, 2022
    Inventors: WEI-PO SHEN, CHUN-MING LAI, CHIH-CHIANG CHANG, WEN-HSING HUANG, TZENG-GUANG TSAI, KUO-HSIN HUANG