Patents by Inventor Wen-Hung Tseng
Wen-Hung Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145461Abstract: A modulation device includes a substrate, an electrostatic discharge protection element, an electronic element, and a driving element. The substrate has an active region. The electrostatic discharge protection element is arranged around the active region. The electronic element is disposed in the active region. The driving element is electrically connected to the electronic element.Type: ApplicationFiled: October 4, 2023Publication date: May 2, 2024Applicant: Innolux CorporationInventors: Ker-Yih Kao, Tong-Jung Wang, Wen-Chieh Lin, Ming-Chun Tseng, Yi-Hung Lin
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Publication number: 20240134150Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Inventors: Chun-Yi LU, Te-Sheng TSENG, Wen-Hung HSU
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Publication number: 20240136472Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
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Publication number: 20240118514Abstract: A camera driving module includes: a base including a central opening; a casing disposed on the base and including an opening hole corresponding to the central opening; a lens unit movably disposed on the casing; and a focus driving part. The focus driving part includes a carrier, an AF coil element, at least two permanent magnets and a Hall element. The carrier is disposed on the lens unit and movable in a direction parallel to an optical axis. The AF coil element is fixed to the base and faces toward the carrier. The permanent magnets are fixed on one side of the carrier facing toward the base and disposed opposite to each other about the optical axis. The Hall element faces toward a corresponding surface of one of the permanent magnets. The AF coil element and the corresponding surfaces are arranged in the direction parallel to the optical axis.Type: ApplicationFiled: December 13, 2023Publication date: April 11, 2024Applicant: LARGAN DIGITAL CO.,LTD.Inventors: Te-Sheng TSENG, Ming-Ta CHOU, Wen-Hung HSU
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Publication number: 20240118589Abstract: A camera module includes a plastic carrier, an imaging lens assembly, a reflective element and a plurality of auto-focusing elements. The plastic carrier includes an inner portion and an outer portion, wherein an inner space is defined by the inner portion, and the outer portion includes at least one mounting structure. The imaging lens assembly is disposed in the inner space of the plastic carrier. The reflective element is for folding an image light by a reflective surface of the reflective element into the imaging lens assembly. The auto-focusing elements include at least two magnets and at least one wiring element, wherein the auto-focusing elements are for moving the plastic carrier along a second optical axis of the imaging lens assembly, and the magnets or the wiring element can be disposed on the mounting structure of the outer portion.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Te-Sheng TSENG, Ming-Ta CHOU, Wen-Hung HSU
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Patent number: 11929767Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.Type: GrantFiled: August 16, 2022Date of Patent: March 12, 2024Assignee: MEDIATEK INC.Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
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Patent number: 11735477Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.Type: GrantFiled: May 21, 2020Date of Patent: August 22, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Wen-Hung Tseng
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Publication number: 20230192541Abstract: The present invention relates to a fiber composite material and a method for producing the fiber composite material. The method for producing the fiber composite material includes a hydrolysis step of a silicon precursor having an alkoxy group, an in-situ condensation step and a drying step. A specific silicon precursor having a secondary amino group and alkyl groups is used therein, as well as a specific weight ratio of the silicon precursor to a fiber material, the in-situ condensation step can be performed in the absence of organic solvents in the method for producing the fiber composite material, and a hydrophobic modification on silicon-based gels can be performed, thereby simplifying the process, decreasing a thermal conductivity of the resulted fiber composite material and preventing drop dust of the resulted fiber composite material.Type: ApplicationFiled: December 13, 2022Publication date: June 22, 2023Inventors: Wen-Bee KUO, Ming-Hung CHENG, Wan-Tun HUNG, Yu-Cheng CHEN, Wen-Hung TSENG, Kuo-Ming HUANG, Wen-Chieh LAI, Shang-Shih LI, Wen-Yuan CHEN, Hsin TSENG, Hsun-Ku LEE, Yu-Hsin CHEN
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Publication number: 20230192501Abstract: The present invention relates to silicon-based powders and a method for producing the silicon-based powders. The method for producing the silicon-based powders includes a hydrolysis step of a silicon precursor having an alkoxy group, a condensation step and a drying step. By a specific weight ratio of water to the silicon precursor having the alkoxy group and a silicon precursor having a secondary amino group and an alkyl group, in the method for producing the silicon-based powders, the condensation step can be performed without organic solvents, and a modification on silicon-based gels can be performed to enhance a safety of processes and a hydrophobicity of the resulted silicon-based powders, and decrease a thermal conductivity and a bulk density of the resulted silicon-based powders.Type: ApplicationFiled: December 16, 2022Publication date: June 22, 2023Inventors: Wen-Bee KUO, Ming-Hung CHENG, Wan-Tun HUNG, Yu-Cheng CHEN, Wen-Hung TSENG, Kuo-Ming HUANG, Wen-Chieh LAI, Shang-Shih LI, Wen-Yuan CHEN, Hsin TSENG, Hsun-Ku LEE, Yu-Hsin CHEN
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Patent number: 11081394Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.Type: GrantFiled: October 8, 2018Date of Patent: August 3, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh
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Publication number: 20200286782Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.Type: ApplicationFiled: May 21, 2020Publication date: September 10, 2020Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Wen-Hung Tseng
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Patent number: 10672656Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.Type: GrantFiled: October 5, 2015Date of Patent: June 2, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Wen-Hung Tseng
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Patent number: 10410913Abstract: A method for forming metal contacts within a semiconductor device includes forming a first-layer contact into a first dielectric layer that surrounds at least one gate electrode, the first-layer contact extending to a doped region of an underlying substrate. The method further includes forming a second dielectric layer over the first dielectric layer and forming a second-layer contact extending through the second dielectric layer to the first-layer contact.Type: GrantFiled: May 9, 2016Date of Patent: September 10, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Chih-Ming Lai, Ken-Hsien Hsieh, Tsai-Sheng Gau, Ru-Gun Liu
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Publication number: 20190051564Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.Type: ApplicationFiled: October 8, 2018Publication date: February 14, 2019Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh
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Patent number: 10096519Abstract: A method of fabricating a fin-like field-effect transistor device is disclosed. The method includes forming mandrel features over a substrate and performing a first cut to remove mandrel features to form a first space. The method also includes performing a second cut to remove a portion of mandrel features to form a line-end and an end-to-end space. After the first and the second cuts, the substrate is etched using the mandrel features, with the first space and the end-to-end space as an etch mask, to form fins. Depositing a space layer to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the first space and the end-to-end space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the first space and the end-to-end space and an isolation trench is formed in the first space and the end-to-end space.Type: GrantFiled: September 6, 2016Date of Patent: October 9, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh
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Publication number: 20160254183Abstract: A method for forming metal contacts within a semiconductor device includes forming a first-layer contact into a first dielectric layer that surrounds at least one gate electrode, the first-layer contact extending to a doped region of an underlying substrate. The method further includes forming a second dielectric layer over the first dielectric layer and forming a second-layer contact extending through the second dielectric layer to the first-layer contact.Type: ApplicationFiled: May 9, 2016Publication date: September 1, 2016Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Chih-Ming Lai, Ken-Hsien Hsieh, Tsai-Sheng Gau, Ru-Gun Liu
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Patent number: 9337083Abstract: A method for forming metal contacts within a semiconductor device includes forming a first-layer contact into a first dielectric layer that surrounds at least one gate electrode, the first-layer contact extending to a doped region of an underlying substrate. The method further includes forming a second dielectric layer over the first dielectric layer and forming a second-layer contact extending through the second dielectric layer to the first-layer contact.Type: GrantFiled: June 6, 2013Date of Patent: May 10, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Chih-Ming Lai, Ken-Hsien Hsieh, Tsai-Sheng Gau, Ru-Gun Liu
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Publication number: 20160027692Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.Type: ApplicationFiled: October 5, 2015Publication date: January 28, 2016Inventors: Ming-Feng Shieh, Hung-Chang Hsieh, Wen-Hung Tseng
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Patent number: 9152046Abstract: A method for fabricating a semiconductor product includes applying a photo-resist layer to a substrate, the photo-resist layer including a higher acid concentration at an upper portion of the photo-resist layer than at a lower portion of the photo-resist layer. The method also includes exposing the photo-resist layer to a light source through a mask including a feature, the photo-resist layer including a floating, diffusing acid that will diffuse into a region of the photo-resist layer affected by the feature while not diffusing into a feature formed by the mask.Type: GrantFiled: January 16, 2015Date of Patent: October 6, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Yu Chang, Ming-Feng Shieh, Wen-Hung Tseng
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Patent number: 9153483Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.Type: GrantFiled: October 30, 2013Date of Patent: October 6, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Feng Shieh, Wen-Hung Tseng, Hung-Chang Hsieh