Patents by Inventor Wen-Jen Chen

Wen-Jen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250070092
    Abstract: Various embodiments of the present disclosure are directed towards a shared frontside pad/bridge layout for a three-dimensional (3D) integrated circuit (IC), as well as the 3D IC and a method for forming the 3D IC. A second IC die underlies the first IC die, and a third IC die underlies the second IC die. A first-die backside pad, a second-die backside pad, and a third die backside pad are in a row extending in a dimension and overlie the first, second, and third IC dies. Further, the first-die, second-die, and third-die backside pads are electrically coupled respectively to individual semiconductor devices of the first, second, and third IC dies. The second and third IC dies include individual pad/bridge structures at top metal (TM) layers of corresponding interconnect structures. The pad/bridge structures share the shared frontside pad/bridge layout and provide lateral routing in the dimension for the aforementioned electrical coupling.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Inventors: Harry-Hak-Lay Chuang, Wei-Cheng Wu, Wen-Tuo Huang, Chia-Sheng Lin, Wei Chuang Wu, Shih Kuang Yang, Chung-Jen Huang, Shun-Kuan Lin, Chien Lin Liu, Ping-Tzu Chen, Yung Chun Tu
  • Publication number: 20250048671
    Abstract: A transistor structure including a substrate, a gate dielectric layer, a gate, a first doped region, a second doped region, a first drift region, and a dummy gate is provided. The gate dielectric layer is located on the substrate. The gate dielectric layer includes first and second portions. The second portion is connected to the first portion. The thickness of the second portion is greater than the thickness of the first portion. The gate is located on the first and second portions. The first doped region and the second doped region are located in the substrate on two sides of the gate dielectric layer. The first drift region is located in the substrate on one side of the gate. The second doped region is located in the first drift region. The dummy gate is located on the second portion between the gate and the second doped region.
    Type: Application
    Filed: September 1, 2023
    Publication date: February 6, 2025
    Applicant: United Microelectronics Corp.
    Inventors: Hsuan-Kai Chen, Tun-Jen Cheng, Ching-Chung Yang, Nien-Chung Li, Wen-Fang Lee, Chiu-Te Lee
  • Publication number: 20200123495
    Abstract: Described herein are methods and compositions for controlling insects and microorganims growth using Pseudomonas taiwanensis and its culture broth.
    Type: Application
    Filed: October 25, 2019
    Publication date: April 23, 2020
    Inventors: Ming-Che Shih, Wen-Jen Chen, Je-Ruei Liu, Yu-Liang Yang
  • Publication number: 20170081632
    Abstract: Described herein are method and compositions for controlling insects and microorganisms growth using Pseudomonas taiwanensis and its culture broth.
    Type: Application
    Filed: June 10, 2015
    Publication date: March 23, 2017
    Inventors: Ming-Che Shih, Wen-Jen Chen, Je-Ruei Liu, Yu-Liang Yang
  • Patent number: 9209780
    Abstract: A piezoelectric oscillator includes a piezoelectric vibrating piece, an integrated circuit, and a package. The package includes a first layer, a second layer, a third layer, and a fourth layer. The ceiling surface as a portion of the inferior surface of the third layer has a rectangular shape surrounded by short sides and long sides. The ceiling surface includes a pair of frequency checking terminals electrically connected to the connecting electrodes and control terminals to control the integrated circuit. The pair of the frequency checking terminal are adjacent to one another. The respective frequency checking terminals are disposed in contact with any of the long sides and one of the short sides. The control terminals are extracted to the top surface of the third layer, and overlap the frequency checking terminals in a vertical direction on the top surface of the third layer to be connected to the mounting terminals.
    Type: Grant
    Filed: September 1, 2014
    Date of Patent: December 8, 2015
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Wen Jen Chen
  • Patent number: 9154076
    Abstract: A dual-mode crystal oscillator includes a single AT-cut quartz crystal piece, a package, and an integrated circuit. The integrated circuit includes an oscillation circuit configured to cause the AT-cut quartz crystal piece to oscillate at a frequency in the MHz band, a dividing circuit configured to divide the frequency in the MHz band to generate a frequency of 32.768 kHz, a selection circuit configured to select one of a pause state where the frequency in the MHz band is not output and an active state where the frequency in the MHz band is output. The mounting surface includes three electrodes arranged in a direction along the long side and two electrodes arranged in a direction along the short side. The electrode to output the frequency of 32.768 kHz and the electrode to output the frequency in the MHz band are arranged not adjacent to one another.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: October 6, 2015
    Assignee: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Wen Jen Chen, Chisato Ishimaru
  • Publication number: 20150145613
    Abstract: A piezoelectric oscillator includes a piezoelectric vibrating piece, an integrated circuit, and a package. The package includes a first layer, a second layer, a third layer, and a fourth layer. The ceiling surface as a portion of the inferior surface of the third layer has a rectangular shape surrounded by short sides and long sides. The ceiling surface includes a pair of frequency checking terminals electrically connected to the connecting electrodes and control terminals to control the integrated circuit. The pair of the frequency checking terminal are adjacent to one another. The respective frequency checking terminals are disposed in contact with any of the long sides and one of the short sides. The control terminals are extracted to the top surface of the third layer, and overlap the frequency checking terminals in a vertical direction on the top surface of the third layer to be connected to the mounting terminals.
    Type: Application
    Filed: September 1, 2014
    Publication date: May 28, 2015
    Inventor: WEN JEN CHEN
  • Publication number: 20140361842
    Abstract: A dual-mode crystal oscillator includes a single AT-cut quartz crystal piece, a package, and an integrated circuit. The integrated circuit includes an oscillation circuit configured to cause the AT-cut quartz crystal piece to oscillate at a frequency in the MHz band, a dividing circuit configured to divide the frequency in the MHz band to generate a frequency of 32.768 kHz, a selection circuit configured to select one of a pause state where the frequency in the MHz band is not output and an active state where the frequency in the MHz band is output. The mounting surface includes three electrodes arranged in a direction along the long side and two electrodes arranged in a direction along the short side. The electrode to output the frequency of 32.768 kHz and the electrode to output the frequency in the MHz band are arranged not adjacent to one another.
    Type: Application
    Filed: June 5, 2014
    Publication date: December 11, 2014
    Inventors: WEN JEN CHEN, CHISATO ISHIMARU
  • Publication number: 20130337476
    Abstract: Disclosed herein is a method for the detection or preliminary screening of coronary artery disease, including: obtaining a urine sample from a human subject suspected of having coronary artery disease; detecting a level of sCD14 in the urine sample from the human subject suspected of having coronary artery disease; and comparing the detected level of sCD14 in the urine sample with a predetermined standard, wherein the level of sCD14 in the urine sample from the human subject suspected of having coronary artery disease greater than the predetermined standard is indicative of the presence of coronary artery disease.
    Type: Application
    Filed: June 13, 2012
    Publication date: December 19, 2013
    Inventors: Min-Yi Lee, Shyh-Horng Chiou, Wen-Jen Chen