Patents by Inventor Wen-Jin Li

Wen-Jin Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456711
    Abstract: The measurement method includes operations of applying a first gate bias voltage to a gate terminal of a first transistor that is included in a radio frequency (RF) power amplifier during a direct current (DC) measurement period, wherein the first transistor operates in a linear operation mode during the DC measurement period; measuring a first drain-source voltage of the first transistor and a current flowing through the first transistor via a connection node during the DC measurement period; applying a second gate bias voltage and a drain bias voltage to a gate terminal and a drain terminal of a second transistor that is electrically connected to the first transistor via the connection node; and measuring a DC value of the second transistor via the connection node during the DC measurement period.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: En-Hsiang Yeh, Wen-Sheng Chen, Chia-Ming Liang, Chung-Ho Chai, Zong-You Li, Tzu-Jin Yeh
  • Publication number: 20220130751
    Abstract: A copper plating structure and a package structure including the same are provided, and the copper plating structure includes at least one first copper layer and at least one second copper layer. The first copper layer includes a (111) crystal plane, wherein a proportion of the (111) crystal plane in each of the first copper layers is 36% to 100%. The second copper layer is located on the first copper layer and includes a non-(111) crystal plane or includes a (111) crystal plane and a non-(111) crystal plane, wherein a proportion of the (111) crystal plane in each of the second copper layers is 0% to 57%.
    Type: Application
    Filed: December 23, 2020
    Publication date: April 28, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Ming-Huei Yen, Wen-Jin Li, Zi-Ting Lin, Yu-Ling Chang
  • Patent number: 10545700
    Abstract: A memory management method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: performing a data merge operation for at least one physical unit of the rewritable non-volatile memory module according to a write command from a host system; and adjusting times of performing the data merge operation according to a dispersion rate of a plurality of logical units corresponding to first data stored in at least one first-type physical unit of the rewritable non-volatile memory module.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: January 28, 2020
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Che-Yueh Kuo, Wen-Jin Li
  • Publication number: 20190317694
    Abstract: A memory management method for a memory storage device including a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: performing a data merge operation for at least one physical unit of the rewritable non-volatile memory module according to a write command from a host system; and adjusting times of performing the data merge operation according to a dispersion rate of a plurality of logical units corresponding to first data stored in at least one first-type physical unit of the rewritable non-volatile memory module.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 17, 2019
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Che-Yueh Kuo, Wen-Jin Li
  • Publication number: 20080248194
    Abstract: Methods and apparatus for producing a copper layer on substrate in a flat panel display manufacturing process, where the copper is electrodelessly deposited on a substrate to form a copper interconnection layer. A copper solution containing: CuSO4 5H2O as a copper source, potassium sodium tartrate or trisodium citrate as a complexing agent, glyoxylate, glyoxilic acid or sodium phosphate as a reducing agent, a sulfur organic compound as a stabilizing agent, and a pH adjusting agent, is used to form the copper interconnection layer on the substrate.
    Type: Application
    Filed: November 30, 2007
    Publication date: October 9, 2008
    Applicant: L'Air Liquide - Societe Anonyme pour l'Etude et l'Exploitation des Procedes Georges Claude
    Inventors: Akinobu NASU, Shyuan-Fang Chen, Wen-Jin Li, Yi-Tsung Chen
  • Patent number: 7381495
    Abstract: A do-it-yourself (DIY) thin film battery provides battery assembling components suitable for separate storage and easy fabrication. With through hole plating or sidewall plating, the current collectors of the anode and cathode, extend from one side of the substrates to the other to facilitate electric coupling with the electronic product outside. Through either soldering or direct contact with conductive tapes, the battery components mount with each other. Thus, the battery components can be combined to have batteries of various voltages and capacities via series or parallel connection means without extra circuits.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: June 3, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Wen-Jin Li, Kuan-Liang Chen, Min-Lun Chen, Shinn-Horng Yeh
  • Publication number: 20050130036
    Abstract: A do-it-yourself (DIY) thin film battery provides battery assembling components suitable for separate storage and easy fabrication. With through hole plating or sidewall plating, the current collectors of the anode and cathode, extend from one side of the substrates to the other to facilitate electric coupling with the electronic product outside. Through either soldering or direct contact with conductive tapes, the battery components mount with each other. Thus, the battery components can be combined to have batteries of various voltages and capacities via series or parallel connection means without extra circuits.
    Type: Application
    Filed: May 20, 2004
    Publication date: June 16, 2005
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Jin Li, Kuan-Liang Chen, Min-Lun Chen, Shinn-Horng Yeh