Patents by Inventor Wen-Jui Kuo

Wen-Jui Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10387609
    Abstract: A method for determining a loading current of a circuit board is provided. In the method, outline positions of metal regions and hollowed regions in each of the metal regions are recorded. Metal widths corresponding to scan lines in circuit board are calculated in a sequence, so that a minimum metal width on each of the scan lines is acquired. According to the minimum metal width, a maximum loading current of each of the metal regions is calculated. In addition, a method and a system for filtering manufacturers are provided. A processing apparatus of the system analyzes the maximum loading current and manufacturing process parameters of the circuit board, calculates a weight score of a manufacturing process capability parameter table of each manufacturer according to the maximum loading current and manufacturing process parameters, and filtering the manufacturers to produce the best fit manufacturer list.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: August 20, 2019
    Assignee: Wistron Corporation
    Inventors: Ruey-Rong Chang, Wen-Jui Kuo, Feng-Ling Lin, Tzu-Heng Yeh
  • Publication number: 20180330041
    Abstract: A method for determining a loading current of a circuit board is provided. In the method, outline positions of metal regions and hollowed regions in each of the metal regions are recorded. Metal widths corresponding to scan lines in circuit board are calculated in a sequence, so that a minimum metal width on each of the scan lines is acquired. According to the minimum metal width, a maximum loading current of each of the metal regions is calculated. In addition, a method and a system for filtering manufacturers are provided. A processing apparatus of the system analyzes the maximum loading current and manufacturing process parameters of the circuit board, calculates a weight score of a manufacturing process capability parameter table of each manufacturer according to the maximum loading current and manufacturing process parameters, and filtering the manufacturers to produce the best fit manufacturer list.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Applicant: Wistron Corporation
    Inventors: Ruey-Rong Chang, Wen-Jui Kuo, Feng-Ling Lin, Tzu-Heng Yeh
  • Patent number: 10127345
    Abstract: A method for determining a loading current of a circuit board is provided. In the method, outline positions of metal regions and hollowed regions in each of the metal regions are recorded. Metal widths corresponding to scan lines in circuit board are calculated in a sequence, so that a minimum metal width on each of the scan lines is acquired. According to the minimum metal width, a maximum loading current of each of the metal regions is calculated. In addition, a method and a system for filtering manufacturers are provided. A processing apparatus of the system analyzes the maximum loading current and manufacturing process parameters of the circuit board, calculates a weight score of a manufacturing process capability parameter table of each manufacturer according to the maximum loading current and manufacturing process parameters, and filtering the manufacturers to produce the best fit manufacturer list.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: November 13, 2018
    Assignee: Wistron Corporation
    Inventors: Ruey-Rong Chang, Wen-Jui Kuo, Feng-Ling Lin, Tzu-Heng Yeh
  • Patent number: 9092588
    Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; generating a layout suggestion when the crosstalk value is larger than the predetermined value.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: July 28, 2015
    Assignee: WISTRON CORP.
    Inventors: Wen-Hsiang Lee, Wen-Jui Kuo, Feng-Ling Lin, Hsiao-Ming Wang, Lung-Ming Chan, Li-Ting Hung
  • Publication number: 20150192620
    Abstract: A method for determining a loading current of a circuit board is provided. In the method, outline positions of metal regions and hollowed regions in each of the metal regions are recorded. Metal widths corresponding to scan lines in circuit board are calculated in a sequence, so that a minimum metal width on each of the scan lines is acquired. According to the minimum metal width, a maximum loading current of each of the metal regions is calculated. In addition, a method and a system for filtering manufacturers are provided. A processing apparatus of the system analyzes the maximum loading current and manufacturing process parameters of the circuit board, calculates a weight score of a manufacturing process capability parameter table of each manufacturer according to the maximum loading current and manufacturing process parameters, and filtering the manufacturers to produce the best fit manufacturer list.
    Type: Application
    Filed: May 8, 2014
    Publication date: July 9, 2015
    Applicant: Wistron Corporation
    Inventors: Ruey-Rong Chang, Wen-Jui Kuo, Feng-Ling Lin, Tzu-Heng Yeh
  • Publication number: 20150135157
    Abstract: A circuit-design method for a PCB is provided. A first user input is obtained via a user interface of a layout tool, wherein the first user input indicates that an object of a circuit diagram of the PCB is selected in the user interface. A plurality of constraint settings corresponding to an attribute are obtained from a database according to the attribute of the object. The plurality of constraint settings are displayed in a window of the user interface. A second user input is obtained via the user interface, wherein the second user input indicates that one of the plurality of constraint settings is selected in the window. At least one constraint parameter corresponding to the selected constraint setting is assigned to the object, and a tag corresponding to the attribute of the object is attached to the object of the circuit diagram.
    Type: Application
    Filed: January 8, 2014
    Publication date: May 14, 2015
    Applicant: Wistron Corp
    Inventors: Feng-Ling Lin, Ruey-Rong Chang, Wen-Jui Kuo
  • Patent number: 9032349
    Abstract: One implementation of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing a layout suggestion table when the crosstalk value is larger than the predetermined value.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: May 12, 2015
    Assignee: Wistron Corp.
    Inventors: Wen-Hsiang Lee, Wen-Jui Kuo, Feng-Ling Lin, Hsiao Ming Wang, Lung-Ming Chan, Li-Ting Hung
  • Patent number: 9015644
    Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer including: executing a layout program for a layout circuit; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing an interface for showing information of the layout result and adjusting a plurality of lines of the layout circuit.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: April 21, 2015
    Assignee: Wistron Corp.
    Inventors: Wen-Hsiang Lee, Wen-Jui Kuo, Feng-Ling Lin, Hsiao Ming Wang, Lung-Ming Chan, Li-Ting Hung
  • Publication number: 20150089461
    Abstract: An embodiment of the invention introduces a method for generating schematic diagrams, executed by a processing unit of an apparatus, which comprises the following steps. A pin-editing interface comprising a data table is generated to assist a user to configure pin settings. A user setting is obtained via the pin-editing interface, and a schematic diagram is generated on a display unit according to the obtained user setting.
    Type: Application
    Filed: November 19, 2013
    Publication date: March 26, 2015
    Applicant: WISTRON CORP.
    Inventors: Feng-Ling Lin, Wen-Jui Kuo, Lee-Chieh Kang
  • Patent number: 8984455
    Abstract: An embodiment of the invention introduces a method for generating schematic diagrams, executed by a processing unit of an apparatus, which comprises the following steps. A pin-editing interface comprising a data table is generated to assist a user to configure pin settings. A user setting is obtained via the pin-editing interface, and a schematic diagram is generated on a display unit according to the obtained user setting.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: March 17, 2015
    Assignee: Wistron Corp.
    Inventors: Feng-Ling Lin, Wen-Jui Kuo, Lee-Chieh Kang
  • Publication number: 20140317585
    Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer including: executing a layout program for a layout circuit; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing an interface for showing information of the layout result and adjusting a plurality of lines of the layout circuit.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 23, 2014
    Inventors: Wen-Hsiang LEE, Wen-Jui KUO, Feng-Ling LIN, Hsiao Ming WANG, Lung-Ming CHAN, Li-Ting HUNG
  • Publication number: 20140250415
    Abstract: One implementation of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; providing a layout suggestion table when the crosstalk value is larger than the predetermined value.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 4, 2014
    Applicant: Wistron Corp.
    Inventors: Wen-Hsiang LEE, Wen-Jui KUO, Feng-Ling LIN, Hsiao Ming WANG, Lung-Ming CHAN, Li-Ting HUNG
  • Publication number: 20140040846
    Abstract: An embodiment of the disclosure provides a crosstalk analysis method executed by a computer. The method includes steps of: executing a layout program; executing a crosstalk analysis program; acquiring, by the crosstalk analysis program, a plurality of parameters from a layout result generated by the layout program; estimating a crosstalk value according to the parameters; determining whether the crosstalk value is larger than a predetermined value; generating a layout suggestion when the crosstalk value is larger than the predetermined value.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 6, 2014
    Applicant: Wistron Corp.
    Inventors: Wen-Hsiang LEE, Wen-Jui KUO, Feng-Ling LIN, Hsiao-Ming WANG, Lung-Ming CHAN, Li-Ting HUNG
  • Patent number: 6171005
    Abstract: A calendar pen has an outer cover having multiple windows and multiple first indicators formed thereon, an inner cover rotatably received in the outer cover and having multiple rows of marks peripherally formed thereon and each corresponding to the windows and a rotator rotatably mounted on the inner cover and having a plurality of second indicators selectively aligning with the arrow of the outer cover, such that a user will have the exact date of the day by just rotating different part of the pen.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: January 9, 2001
    Inventor: Wen-Jui Kuo
  • Patent number: D375124
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: October 29, 1996
    Inventor: Wen-Jui Kuo
  • Patent number: D391292
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: February 24, 1998
    Inventor: Wen-jui Kuo