Patents by Inventor Wen-Keir LIANG

Wen-Keir LIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Alignment mark patterns and wafer structures comprising the same
    Patent number: 10818606
    Abstract: An alignment mark pattern is provided. The alignment mark pattern includes a first region that includes a first line and a first space having different widths therebetween, a second region that includes a second line and a second space having different widths therebetween, a third region that includes a third line and a third space having different widths therebetween, and a fourth region that includes a fourth line and a fourth space having different widths therebetween. The first and second lines extend in a first direction. The third and fourth lines extend in a second direction perpendicular to the first direction. The first region is diagonal to the second region. The third region is diagonal to the fourth region. The third region is adjacent to the first and second regions. The fourth region is adjacent to the first and second regions.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: October 27, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Jun-Che Wu, Jing-Hua Chiang, Wen-Keir Liang, Ming-Yu Chen
  • ALIGNMENT MARK PATTERNS AND WAFER STRUCTURES COMPRISING THE SAME
    Publication number: 20200321284
    Abstract: An alignment mark pattern is provided. The alignment mark pattern includes a first region that includes a first line and a first space having different widths therebetween, a second region that includes a second line and a second space having different widths therebetween, a third region that includes a third line and a third space having different widths therebetween, and a fourth region that includes a fourth line and a fourth space having different widths therebetween. The first and second lines extend in a first direction. The third and fourth lines extend in a second direction perpendicular to the first direction. The first region is diagonal to the second region. The third region is diagonal to the fourth region. The third region is adjacent to the first and second regions. The fourth region is adjacent to the first and second regions.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 8, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Jun-Che WU, Jing-Hua CHIANG, Wen-Keir LIANG, Ming-Yu CHEN