Patents by Inventor Wen Lee

Wen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250142884
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Application
    Filed: December 30, 2024
    Publication date: May 1, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Publication number: 20250125106
    Abstract: A mechanical keyboard is provided, which includes a plurality of mechanical keys, a circuit board, a plurality of first magnetic elements, a lower casing and a plurality of second magnetic elements. The mechanical keyboard has a key region and an edge region surrounding the key region. The mechanical keys are located in the key region. The circuit board is disposed beneath the mechanical keys. The first magnetic elements are disposed beneath the circuit board and distributed in the key region. The lower casing is disposed beneath the mechanical keys, the circuit board and the first magnetic elements. The second magnetic elements are disposed over the lower casing, in which the second magnetic elements respectively correspond to the first magnetic elements and respectively repel the first magnetic elements.
    Type: Application
    Filed: November 13, 2023
    Publication date: April 17, 2025
    Inventors: Shu-An Huang, Kai-Wen Lee, Sheng-An Tsai, Li-Kuei Cheng, Tsun-Han Wu, Chen-Wei Chan, Shao-Ju Yen
  • Patent number: 12264072
    Abstract: Provided is a process for manufacturing a graphene material, the process comprising (a) injecting a rust stock into a first end of a continuous reactor having a toroidal vortex flow, wherein the first stock comprises graphite and a non-oxidizing liquid (or, alternatively, graphite, an acid, and an optional oxidizer) and the continuous flow reactor is configured to produce the toroidal vortex flow, enabling the formation of a reaction product suspension or slurry at the second end, downstream from the first end, of the continuous reactor; and (b) introducing the reaction product suspension/slurry from the second end back to enter the continuous reactor at or near the first end, allowing the reaction product suspension/slurry to form a toroidal vortex flow and move down to or near the second end to produce a graphene suspension or graphene oxide slurry. The process may further comprise repeating step (b) for at least one time.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: April 1, 2025
    Assignee: Global Graphene Group, Inc.
    Inventors: Yi-jun Lin, Hsuan-Wen Lee, Aruna Zhamu, Bor Z. Jang
  • Patent number: 12266715
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chen-Ping Chen, Kuei-Yu Kao, Hsiao Wen Lee, Chih-Han Lin
  • Publication number: 20250098818
    Abstract: Described is a shoe, in particular an athletic shoe. The shoe can include a sole and a shoe upper. The shoe upper can include (a.) a lateral portion; (b.) a medial portion; and (c.) intermediate portion between the lateral portion and the medial portion. The intermediate portion can include a portion uncoated by a first coating portion on the lateral portion and a second coating portion on the medial portion.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Inventors: Fu Wen Lee, LuLu Chen, Sam Forester
  • Patent number: 12261170
    Abstract: A semiconductor device includes a plurality of first stack structures formed in a first area of a substrate, wherein the plurality of first stack structures are configured to form a plurality of first transistors that operate under a first voltage level. The semiconductor device includes a plurality of second stack structures formed in a second area of the substrate, wherein the plurality of second stack structures are configured to form a plurality of second transistors that operate under a second voltage level greater than the first voltage level. The semiconductor device includes a first isolation structure disposed between neighboring ones of the plurality of first stack structures and has a first height. The semiconductor device includes a second isolation structure disposed between neighboring ones of the plurality of second stack structures and has a second height. The first height is greater than the second height.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: March 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Yu-Shan Cheng, Ming-Ching Chang
  • Publication number: 20250081532
    Abstract: A semiconductor device includes an active gate structure extending along a first lateral direction. The semiconductor device includes an inactive gate structure also extending along the first lateral direction. The semiconductor device includes a first epitaxial structure disposed between the active gate structure and the inactive gate structure along a second lateral direction perpendicular to the first lateral direction. The active gate structure wraps around each of a plurality of channel layers that extend along the second direction, and the inactive gate structure straddles a semiconductor cladding layer that continuously extends along a first sidewall of the first epitaxial structure and across the plurality of channel layers.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Ming-Ching Chang
  • Publication number: 20250077162
    Abstract: A collaboration system and a collaboration method are provided. The collaboration system includes a first display device and a second display device. The first display device includes a first screen. The first screen displays a first display interface. The first display interface has a first display window and a first function key. The first display window displays a first frame. The second display device includes a second display screen. The second display screen displays a second display interface. The second display interface has a second display window. The second display window displays a second frame. When the first function key is turned on, the first frame moves along with the second frame. When the first function key is turned off, the first frame does not follow the movement of the second frame.
    Type: Application
    Filed: August 25, 2024
    Publication date: March 6, 2025
    Applicant: Optoma Corporation
    Inventor: Wen Lee
  • Publication number: 20250077003
    Abstract: A roller module includes a scroll wheel, a magnetization member, a swinging element and a pole-reversible magnetic element. The magnetization member is synchronously rotated with the scroll wheel. The swinging element includes a pivotal part, a first magnetic element and a second magnetic element. The first magnetic element and the second magnetic element are movable by using the pivotal part as a rotation center. The pole-reversible magnetic element and the first magnetic element interact with each other. Consequently, the second magnetic element is close to or away from the magnetization member.
    Type: Application
    Filed: October 17, 2023
    Publication date: March 6, 2025
    Inventors: Chun-Nan Su, Chun-Che Wu, Chien-Pang Chien, Kai-Wen Lee, Li-Kuei Cheng
  • Publication number: 20250081587
    Abstract: A semiconductor device includes a channel structure, extending along a first lateral direction, that is disposed over a substrate. The semiconductor device includes a gate structure, extending along a second lateral direction perpendicular to the first lateral direction, that straddles the channel structure. The semiconductor device includes an epitaxial structure, coupled to the channel structure, that is disposed next to the gate structure. The semiconductor device includes a first gate spacer and a second gate spacer each comprising a first portion disposed between the gate structure and the epitaxial structure along the first lateral direction. The semiconductor device includes an air gap interposed between the first portion of the first gate spacer and the first portion of the second gate spacer. The air gap exposes a second portion of the first gate spacer that extends in the first lateral direction.
    Type: Application
    Filed: November 14, 2024
    Publication date: March 6, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Yu-Shan Cheng, Ming-Ching Chang
  • Patent number: 12238395
    Abstract: A playback application is configured to dynamically generate topology for an interactive media title. The playback application obtains an initial topology and also collects various data associated with a user interacting with the feature. The playback application then modifies the initial topology, based on the collected data, to generate a dynamic topology tailored to the user. The dynamic topology describes the set of choices available to the user during playback as well as which options can be selected by the user when making a given choice. In addition, the playback application also selectively buffers different portions of the interactive media title, based on the collected data, in anticipation of the user selecting particular options for available choices.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: February 25, 2025
    Assignee: NETFLIX, INC.
    Inventors: Maxine Cheung, Mark Watson, Carla Christine Fisher, Kevin Pei-Wen Lee, Yves Raimond
  • Patent number: 12216142
    Abstract: Current sensing resistors and a method of manufacturing the same are disclosed in the present invention. A composite material is firstly provided in the method. Then, a first portion of an alloy substrate of the composite material is removed along a first direction to form a plurality of first trenches. Next, a second portion of the alloy substrate of the composite material is removed along a second direction to form a plurality of second trenches, and a third portion of the alloy substrate of the composite material is further removed along the first direction to form the current sensing resistors. The current sensing resistors with small dimensions and an extremely low temperature coefficient of resistance can be produced rapidly by the method of the present invention.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: February 4, 2025
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Hwan-Wen Lee
  • Patent number: 12212325
    Abstract: The present invention provides a quadrature phase detector including a detection circuit. The detection circuit includes a first switch, a second switch and a first filter, wherein the first switch is controlled by a second clock signal to selectively couple a first clock signal to a first node, the second switch is controlled by the second clock signal to selectively coupled the first node to a reference voltage, and the first filter is configured to filter voltages at the first node to generate a first detection result.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: January 28, 2025
    Assignee: MEDIATEK INC.
    Inventors: Fong-Wen Lee, Wen-Chieh Wang, Yu-Hsin Lin
  • Patent number: 12211919
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Grant
    Filed: March 7, 2024
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Patent number: 12201186
    Abstract: Described is a shoe, in particular an athletic shoe. The shoe can include a sole and a shoe upper. The shoe upper can include (a.) a lateral portion; (b.) a medial portion; and (c.) intermediate portion between the lateral portion and the medial portion. The intermediate portion can include a cupped portion uncoated by a first coating portion on the lateral portion and a second coating portion on the medial portion. When the shoe upper is separate from the sole at least a majority of the cupped portion may be cupped above surrounding areas of the shoe upper.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: January 21, 2025
    Assignee: adidas AG
    Inventors: Fu Wen Lee, LuLu Chen, Sam Forester
  • Publication number: 20250022848
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 16, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chang Chi LEE, Jung Jui KANG, Chiu-Wen LEE, Li Chieh CHEN
  • Patent number: 12183620
    Abstract: A die bonding apparatus having: a carrier support unit having at least one support element defining a supporting plane and a carrier holder operable to support the carrier panel on a side of the supporting plane with the carrier panel being parallel to the supporting plane, a wafer feed unit having a wafer holder operable to hold a diced wafer in a manner so as to space the diced wafer apart from the supporting plane defined by the at least one support element of the carrier support unit and orient the diced wafer with an exposed surface of the diced wafer facing the side of the supporting plane to which the carrier panel is supported, and a die transfer module disposed between the carrier support unit and the wafer feed unit, the die transfer module operable to transfer a die from the diced wafer to the carrier panel.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: December 31, 2024
    Assignee: PYXIS CF PTE. LTD.
    Inventors: Hwee Seng Chew, Amlan Sen, Li Jiang Huang, Siew Wen Lee, Qing Feng Guan, Wai Hoe Lee, Kin Fei Chooi
  • Patent number: 12176412
    Abstract: A semiconductor device includes a channel structure, extending along a first lateral direction, that is disposed over a substrate. The semiconductor device includes a gate structure, extending along a second lateral direction perpendicular to the first lateral direction, that straddles the channel structure. The semiconductor device includes an epitaxial structure, coupled to the channel structure, that is disposed next to the gate structure. The semiconductor device includes a first gate spacer and a second gate spacer each comprising a first portion disposed between the gate structure and the epitaxial structure along the first lateral direction. The semiconductor device includes an air gap interposed between the first portion of the first gate spacer and the first portion of the second gate spacer. The air gap exposes a second portion of the first gate spacer that extends in the first lateral direction.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Yu-Shan Cheng, Ming-Ching Chang
  • Patent number: 12176409
    Abstract: A semiconductor device includes an active gate structure extending along a first lateral direction. The semiconductor device includes an inactive gate structure also extending along the first lateral direction. The semiconductor device includes a first epitaxial structure disposed between the active gate structure and the inactive gate structure along a second lateral direction perpendicular to the first lateral direction. The active gate structure wraps around each of a plurality of channel layers that extend along the second direction, and the inactive gate structure straddles a semiconductor cladding layer that continuously extends along a first sidewall of the first epitaxial structure and across the plurality of channel layers.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 24, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Ming-Ching Chang
  • Publication number: 20240395600
    Abstract: A method for making a semiconductor device includes forming a first fin structure, a second fin structure, and a third fin structure over a substrate. The first through third fin structures all extend along a first lateral direction, and the second fin structure is disposed between the first and third fin structures. The method includes forming a mold by filling up trenches between neighboring ones of the first through third fin structures with a first dielectric material. The method includes cutting the second fin structure by removing an upper portion of the second fin structure. The method includes replacing the upper portion of the second fin structure with a second dielectric material to form a dielectric cut structure. The method includes recessing the mold to expose upper portions of the first fin structure and the third fin structure, respectively.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Cheng-Tien Chu, Chi-Wei Yang, Hsiao Wen Lee, Chih-Han Lin, Jr-Jung Lin