Patents by Inventor Wen Lee

Wen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250142884
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Application
    Filed: December 30, 2024
    Publication date: May 1, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Publication number: 20250142719
    Abstract: A flexible circuit board designed for chip integration is provided. The flexible circuit board includes an insulating substrate, a conductive copper layer, a first tin layer, a second tin layer, and a first solder resist layer. The first tin layer has a first tin thickness, and the second tin layer has a greater second tin thickness. A first tin surface of the first tin layer and a second tin surface of the second tin layer are substantially level.
    Type: Application
    Filed: October 8, 2024
    Publication date: May 1, 2025
    Inventors: Chiu-Hong Lai, Wen Ping Hsu, Yi Ling Hsieh, Dong-Sheng Li, Yi Ren Chian, San Lee, Pei-Ying Lee, Ting-Yi Kuo
  • Publication number: 20250134807
    Abstract: A pharmaceutical composition for dry powder inhalation is provided, including an active ingredient and a first pharmacologically acceptable excipient. The active ingredient includes sildenafil or a pharmaceutically acceptable salt thereof. The first pharmacologically acceptable excipient includes amino acid, phospholipid, polylactic acid, polylactic acid copolymer, sugar alcohol, or a combination thereof. In some embodiments of the present disclosure, a method of preparing a pharmaceutical composition for dry powder inhalation is further provided. The pharmaceutical composition for dry powder inhalation increases aerosol property meets the requirements for inhalation administration and reduces onset time.
    Type: Application
    Filed: October 31, 2024
    Publication date: May 1, 2025
    Inventors: Sung Tsai Yu, Hsin-Ke Li, Hao-Wei Huang, Johnson Lee, Shih-Tan Chen, Hou In Leong, Jao Juen Hung, Shih Pan Chao, Wen-Hui Fu
  • Publication number: 20250134896
    Abstract: A pharmaceutical composition for dry powder inhalation is provided, including an active ingredient and a first pharmacologically acceptable excipient. The active ingredient includes vardenafil or a pharmaceutically acceptable salt thereof. The first pharmacologically acceptable excipient includes amino acid, polysaccharide, phospholipid, polylactic acid, polylactic acid copolymer, or a combination thereof. In some embodiments of the present disclosure, a method of preparing a pharmaceutical composition for dry powder inhalation is further provided.
    Type: Application
    Filed: May 30, 2024
    Publication date: May 1, 2025
    Inventors: Sung Tsai Yu, Hao-Wei Huang, Hsin-Ke Li, Johnson Lee, Jao Juen Hung, Shih Pan Chao, Wen-Hui Fu
  • Publication number: 20250134817
    Abstract: A pharmaceutical composition for dry powder inhalation is provided, including an active ingredient and a first pharmacologically acceptable excipient. The active ingredient includes avanafil or a pharmaceutically acceptable salt thereof. The first pharmacologically acceptable excipient includes amino acid, polysaccharide, phospholipid, polylactic acid, polylactic acid copolymer, or a combination thereof. In some embodiments of the present disclosure, a method of preparing a pharmaceutical composition for dry powder inhalation is further provided. The pharmaceutical composition for dry powder inhalation increases aerosol property, meets the requirements for inhalation administration and reduces onset time.
    Type: Application
    Filed: October 30, 2024
    Publication date: May 1, 2025
    Inventors: Sung Tsai YU, Hsin-Ke LI, Hao-Wei HUANG, Shih-Tan CHEN, Hou In LEONG, Johnson LEE, Jao Juen HUNG, Shih Pan CHAO, Wen-Hui FU
  • Publication number: 20250134806
    Abstract: A pharmaceutical composition for dry powder inhalation is provided, including an active ingredient and a first pharmacologically acceptable excipient. The active ingredient includes tadalafil or a pharmaceutically acceptable salt thereof. The first pharmacologically acceptable excipient includes amino acid, polysaccharide, phospholipid, polylactic acid, polylactic acid copolymer, or a combination thereof. In some embodiments of the present disclosure, a method of preparing a pharmaceutical composition for dry powder inhalation is further provided. The pharmaceutical composition for dry powder inhalation increases aerosol property meets the requirements for inhalation administration and reduces onset time.
    Type: Application
    Filed: October 30, 2024
    Publication date: May 1, 2025
    Inventors: Sung Tsai YU, Hsin-Ke LI, Hao-Wei HUANG, Shih-Tan CHEN, Hou In LEONG, Johnson LEE, Jao Juen HUNG, Shih Pan CHAO, Wen-Hui FU
  • Patent number: 12288794
    Abstract: An image sensor includes a storage device, where the storage device includes a memory element, a first dielectric layer and a light shielding element. The memory element includes a storage node and a storage transistor gate, where the storage transistor gate is located over the storage node. The first dielectric layer is located over a portion of the storage transistor gate. The light shielding element is located on the first dielectric layer and includes a semiconductor layer. The semiconductor layer is electrically isolated from the memory element, where the light shielding element is overlapped with at least a part of a perimeter of the storage transistor gate in a vertical projection on a plane along a stacking direction of the memory element and the light shielding element, and the stacking direction is normal to the plane.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: April 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Lei Chen, Clark Lee, Wen-Sheng Wang, Chien-Li Kuo
  • Patent number: 12289040
    Abstract: A driving circuit for driving a light source and a projection device are provided. The driving circuit includes a power converter, a detection circuit, and a control circuit. The power converter provides a driving power to the light source. The detection circuit provides a feedback signal according to a current value of the light source. The control circuit receives an operation command and the feedback signal. The control circuit determines whether the driving circuit enters a light-load state according to at least one of the operation command and the feedback signal. When the driving circuit is determined to enter the light-load state, the control circuit controls the power converter to decrease a current value of the driving power and controls the power converter to increase a switching frequency of the driving power. The driving circuit and the projection device may prevent the light source from flickering under the light-load state.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: April 29, 2025
    Assignee: Coretronic Corporation
    Inventors: Chia-Wen Hsu, Chen-Wang Chen, Tung-Min Lee
  • Publication number: 20250133820
    Abstract: In some embodiments, the present disclosure relates to an integrated device, including a substrate; a gate overlying the substrate; a channel layer separated from the gate by a dielectric and overlying the gate; source/drain regions on the channel layer, the gate extending between the source/drain regions; an insertion layer conforming to an upper surface of the channel layer and comprising a first material; and a passivation layer conforming to an upper surface of the insertion layer and comprising a second material different from the first material; where the passivation layer has a higher density than the insertion layer, such that the passivation layer mitigates the diffusion of environmental materials towards the channel layer, and where the insertion layer mitigates the diffusion of the second material from the passivation layer into the channel layer.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Inventors: I-Che Lee, Wei-Gang Chiu, Pin-Ju Chen, Huai-Ying Huang, Yen-Chieh Huang, Kai-Wen Cheng, Yu-Ming Lin
  • Publication number: 20250127829
    Abstract: The present disclosure provides a method for preventing and/or repairing ocular cell damage by using a Streptococcus thermophilus iHA318 strain and its metabolites.
    Type: Application
    Filed: October 18, 2024
    Publication date: April 24, 2025
    Inventors: Meei-Yn Lin, Pin-Chao Huang, Pei-Cheng Lin, Yi-Wen Chen, Chin-Hsiu Yu, Shao-Yu Lee, Tsung-Han Lu
  • Publication number: 20250133756
    Abstract: A diode is formed in an active region. The diode includes a P-type component embedded in a first portion of the active region, an N-type component embedded in a second portion of the active region, and an undoped component disposed between the P-type component and the N-type component. An interconnect structure is formed over a first side of the diode. Different portions of the interconnect structure are electrically coupled to the P-type component and the N-type component, respectively. One or more openings are etched through a dielectric structure disposed over a second side of the diode opposite the first side. A dopant material is implanted into the active region through the one or more openings. The one or more openings are filled with a conductive material.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 24, 2025
    Inventors: Chen-Ming Lee, Zi-Ang Su, Ming-Shuan Li, I-Wen Wu
  • Patent number: 12283630
    Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.
    Type: Grant
    Filed: November 29, 2023
    Date of Patent: April 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20250122306
    Abstract: The present disclosure relates to antibodies and antibody conjugates that selectively bind to tissue factor and its isoforms and homologs, and compositions comprising the antibodies. Also provided are methods of using the antibodies and antibody conjugates, such as therapeutic and diagnostic methods.
    Type: Application
    Filed: October 11, 2024
    Publication date: April 17, 2025
    Inventors: Grace Jungeun LEE, Amandeep Kaur GAKHAL, Daniel CALARESE, Junhao YANG, Krishna BAJJURI, Xiaofan LI, Sihong ZHOU, Helena KIEFEL, Robert Tian-Xuan YUAN, Andrew James MCGEEHAN, Miao WEN, Gang YIN, Alice yAM
  • Publication number: 20250125106
    Abstract: A mechanical keyboard is provided, which includes a plurality of mechanical keys, a circuit board, a plurality of first magnetic elements, a lower casing and a plurality of second magnetic elements. The mechanical keyboard has a key region and an edge region surrounding the key region. The mechanical keys are located in the key region. The circuit board is disposed beneath the mechanical keys. The first magnetic elements are disposed beneath the circuit board and distributed in the key region. The lower casing is disposed beneath the mechanical keys, the circuit board and the first magnetic elements. The second magnetic elements are disposed over the lower casing, in which the second magnetic elements respectively correspond to the first magnetic elements and respectively repel the first magnetic elements.
    Type: Application
    Filed: November 13, 2023
    Publication date: April 17, 2025
    Inventors: Shu-An Huang, Kai-Wen Lee, Sheng-An Tsai, Li-Kuei Cheng, Tsun-Han Wu, Chen-Wei Chan, Shao-Ju Yen
  • Publication number: 20250125251
    Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, strained layers, source/drain contact patterns, a gate contact via, and source/drain contact vias. The gate structure is disposed over the semiconductor substrate. The strained layers are disposed aside the gate structure. The source/drain contact patterns are disposed on and electrically connected to the strained layers. Top surfaces of the source/drain contact patterns are coplanar with a top surface of the gate structure. The gate contact via is disposed on and electrically connected to the gate structure. The source/drain contact vias are disposed on and electrically connected to the source/drain contact patterns.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 17, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Ling Su, Chia-Wei Su, Tsu-Chun Kuo, Wei-Hao Liao, Hsin-Ping Chen, Yung-Hsu Wu, Ming-Han Lee, Shin-Yi Yang, Chih Wei LU, Hsi-Wen Tien, Meng-Pei Lu
  • Publication number: 20250125148
    Abstract: A method of semiconductor fabrication includes forming a plurality of mandrel recesses in a mandrel layer over a hard mask layer, performing a first patterning process on a spacer layer that is deposited over the mandrel layer to form a first opening pattern, performing a second patterning process to etch portions of the mandrel layer to form a second opening pattern, performing a third patterning process to form a third opening pattern in the hard mask layer based on the first opening pattern and the second opening pattern, and forming, through the hard mask layer, metal lines that are in a semiconductor layer under the hard mask layer and that are arranged in a pattern which corresponds to the third opening pattern.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 17, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Chen LEE, Chia-Tien WU, Wei-Chen CHU, Hsi-Wen TIEN, Wei-Cheng TZENG, Ching-Yu HUANG, Wei-Cheng LIN, Ken-Hsien HSIEH
  • Publication number: 20250120122
    Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12271541
    Abstract: A system comprises an input device structurally configured to be utilized by an operator to control a medical device. The system further comprises a motion sensor associated with the input device and configured to detect a displacement distance of the input device. The system further comprises a control unit configured to determine a velocity cap defining a maximum velocity of the medical device based on the detected displacement distance. The control system is further configured to control movement of the medical device based on the velocity cap.
    Type: Grant
    Filed: February 7, 2024
    Date of Patent: April 8, 2025
    Assignee: INTUITIVE SURGICAL OPERATIONS, INC.
    Inventors: Nicola Diolaiti, Benjamin L. Lee, Shu-Wen Yu
  • Publication number: 20250112081
    Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Inventors: Chien-Fa LEE, Chin-Lin CHOU, Shang-Ying TSAI, Shou-Wen KUO, Kuei-Sung CHANG, Jiun-Rong PAI, Hsu-Shui LIU, Chun-wen CHENG
  • Patent number: D1072806
    Type: Grant
    Filed: January 24, 2021
    Date of Patent: April 29, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang, Sheng-Hung Lee