Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: A method, computer program product and system are provided for preloading debug information based on the presence of incremental source code files. Based on parsed input parameters to a source code debugger, a source code repository and a local storage area are searched for an incremental file. In response to the incremental file being located, a preload indicator in the incremental file, which is a source code file, is set. Based on the preload indicator being set, debug symbol data from the incremental file is merged to a preload symbol list. In response to receiving a command to examine the debug symbol data from the incremental file, the preload symbol list is searched for the requested debug symbol data.

Abstract: A computer-implemented method includes preprocessing, by a compiler, a plurality of macros in a computer program. Preprocessing a macro includes identifying a compile time condition associated with the macro. Preprocessing the macro further includes determining a current value of the compile time condition at the time of compiling a computer instruction and a previous value of the compile time condition. Preprocessing the macro further includes determining a set of computer instructions enclosed by the macro. The method further includes storing a macro information record that includes the compile time condition, the current value and the previous value of the compile time condition, and an identification of the set of computer instructions enclosed by the macro.

Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.

Abstract: Systems, apparatuses, and methods to response to distinguish a ghost target from an actual target based on radar signals is provided. In particular, the disclosure provides an intrusion detection system adapted to receive radar signals and distinguish a potential ghost target from a legitimate target based on a signal to noise ratio of the radar signals and a range to the ghost target and the legitimate target.

Abstract: Systems, apparatuses, and methods to response to distinguish a ghost target from an actual target based on radar signals and ranges determined from the radar signals. In particular, the disclosure provides an intrusion detection system receiving ranges and velocities for targets detected based on radar signals, determining a potential ghost target from the received velocities and confirming the potential ghost target based on estimated ranges and perturbations of the vehicle speed.

Abstract: Certain embodiments herein are directed to managing wireless spectrum, which may include recommending or transmitting spectrum usage changes to one or more wireless devices. A spectrum management system comprising one or more computers may receive spectrum usage information associated with one or more wireless devices. The spectrum management system may generate a spectrum usage map based on the received information. Based on the spectrum usage map, a spectrum usage change is determined and transmitted to one or more wireless devices. The wireless devices may change their operation in accordance with the spectrum usage change.

Abstract: Embodiments of an optically transparent antenna are generally described herein. In some embodiments, the optically transparent antenna may comprise a plurality of electrically-isolated conductive patches arranged on a non-conductive surface. A combination of a size of the conductive patches and a spacing between the conductive patches is less than a human visual acuity for a predetermined viewing distance so that the patches are not be visible or perceptible to a human. In some embodiments, optically transparent antenna may serve as one or more antennas on a mobile platform.

Abstract: Certain embodiments herein are directed to managing wireless spectrum, which may include recommending or transmitting spectrum usage changes to one or more wireless devices. A spectrum management system comprising one or more computers may receive spectrum usage information associated with one or more wireless devices. The spectrum management system may generate a spectrum usage map based on the received information. Based on the spectrum usage map, a spectrum usage change is determined and transmitted to one or more wireless devices. The wireless devices may change their operation in accordance with the spectrum usage change.

Abstract: Embodiments of an optically transparent antenna are generally described herein. In some embodiments, the optically transparent antenna may comprise a plurality of electrically-isolated conductive patches arranged on a non-conductive surface. A combination of a size of the conductive patches and a spacing between the conductive patches is less than a human visual acuity for a predetermined viewing distance so that the patches are not be visible or perceptible to a human. In some embodiments, optically transparent antenna may serve as one or more antennas on a mobile platform.

Abstract: An improved varactor diode (20, 50) having first (45) and second (44) terminals is obtained by providing a substrate (22, 52) having a first surface (21, 51) in which are formed isolation regions (28, 58) separating first (23, 53) and second (25, 55) parts of the diode (20, 50). A varactor junction (40, 70) is formed in the first part (23, 53) and having a first side (35, 66) coupled to the first terminal (45) and a second side (34, 54) coupled to the second terminal (44) via a sub-isolation buried layer (SIBL) region (26, 56) extending under the bottom (886) and partly up the sides (885) of the isolation regions (28, 58) to a further doped region (30, 32; 60, 62) ohmically connected to the second terminal (44). The first part (36, 66) does not extend to the SIBL region (26, 56). The varactor junction (40, 70) desirably comprises a hyper-abrupt doped region (34, 54).