Patents by Inventor Wen-Lung Wu
Wen-Lung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8233291Abstract: A single-stage AC to DC conversion device includes an energy storage unit, a magnetic unit, and a switch unit. The magnetic unit electrically connects the energy storage unit with the switch unit, and has a core, a first winding, a second winding, a third winding, and at least one output winding. The first winding couples with the core and transfers a first electric energy to the core. The second winding couples with the core and stores a second electric energy in the energy storage unit. The third winding couples with the core and transfers the second electric energy to the core. The output winding couples with the core that transfers the first electric energy and the second electric energy, and outputs a third electric energy through the output winding.Type: GrantFiled: May 22, 2009Date of Patent: July 31, 2012Assignee: Gio Optoelectronics Corp.Inventors: Shian-Nan Lin, Wen-Lung Wu
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Publication number: 20090296440Abstract: A single-stage AC to DC conversion device includes an energy storage unit, a magnetic unit, and a switch unit. The magnetic unit electrically connects the energy storage unit with the switch unit, and has a core, a first winding, a second winding, a third winding, and at least one output winding. The first winding couples with the core and transfers a first electric energy to the core. The second winding couples with the core and stores a second electric energy in the energy storage unit. The third winding couples with the core and transfers the second electric energy to the core. The output winding couples with the core that transfers the first electric energy and the second electric energy, and outputs a third electric energy through the output winding.Type: ApplicationFiled: May 22, 2009Publication date: December 3, 2009Inventors: Shian-Nan Lin, Wen-Lung Wu
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Publication number: 20060255744Abstract: A LED illuminating module is provided. A plurality of LEDs are directly disposed on a circuit board to thin out the whole module and minimize its volume. A problem that the circuit board of the conventional LED illuminating module and a board provided with the LEDs are separate is resolved.Type: ApplicationFiled: July 26, 2005Publication date: November 16, 2006Applicant: Industrial Technology Research InstituteInventors: Wen-Lung Wu, Chung-Ping Ku, Li-Ling Lee, H. Lee
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Patent number: 7091623Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.Type: GrantFiled: November 2, 2004Date of Patent: August 15, 2006Assignee: UltraTera CorporationInventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin
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Patent number: 6879030Abstract: A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.Type: GrantFiled: September 30, 2002Date of Patent: April 12, 2005Assignee: Ultratera CorporationInventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin
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Publication number: 20050064631Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.Type: ApplicationFiled: November 2, 2004Publication date: March 24, 2005Inventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin
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Patent number: 6825064Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.Type: GrantFiled: September 30, 2002Date of Patent: November 30, 2004Assignee: UltraTera CorporationInventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin
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Publication number: 20040061209Abstract: A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.Type: ApplicationFiled: September 30, 2002Publication date: April 1, 2004Inventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin
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Publication number: 20040061146Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.Type: ApplicationFiled: September 30, 2002Publication date: April 1, 2004Inventors: Shiann-Tsong Tsai, Yu-Ming Hsu, Wen-Lung Wu, Kuen-Huang Chen, Wen-Sheng Su, Chin-Hsing Lin