Patents by Inventor Wen-Ming Chen

Wen-Ming Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190103389
    Abstract: Present disclosure provides a method for forming a semiconductor packaged wafer, including providing a semiconductor package having a die on a first side of a wafer, partially molding the die by disposing molding material on the first side of the wafer, a peripheral of the first side is free of molding material at a completion of the partially molding, and bonding the semiconductor package with a carrier from the first side of the wafer. Present disclosure also provides a semiconductor packaged wafer, including a die on a first side of a wafer, a molding encapsulating the die and partially positioning on the first side of the wafer by retracting from a peripheral of the first side of the wafer, and a sealing structure on the peripheral of the first side of the wafer.
    Type: Application
    Filed: February 21, 2018
    Publication date: April 4, 2019
    Inventors: FU-CHEN CHANG, CHENG-LIN HUANG, WEN-MING CHEN, SHIH-YEN CHEN, RUEI-YI TSAI, PIN-YI HSIN
  • Patent number: 10163836
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Publication number: 20180330991
    Abstract: An embodiment method includes providing a wafer including a first integrated circuit die, a second integrated circuit die, and a scribe line region between the first integrated circuit die and the second integrated circuit die. The method further includes forming a kerf in the scribe line region and after forming the kerf, using a mechanical sawing process to fully separate the first integrated circuit die from the second integrated circuit die. The kerf extends through a plurality of dielectric layers into a semiconductor substrate.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventors: Fu-Chen Chang, Cheng-Lin Huang, Wen-Ming Chen
  • Patent number: 10014218
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor structure. The semiconductor structure has a central portion and a peripheral portion surrounding the central portion. The method includes forming first conductive bumps and dummy conductive bumps over a surface of the semiconductor structure. The first conductive bumps are over the central portion and electrically connected to the semiconductor structure. The dummy conductive bumps are over the peripheral portion and electrically insulated from the semiconductor structure. The first conductive bumps each have a first thickness and a first width. The dummy conductive bumps each have a second thickness and a second width. The second thickness is less than the first thickness. The second width is greater than the first width.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: July 3, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Fu Shih, Cheng-Lin Huang, Chien-Chen Li, Che-Jung Chu, Wen-Ming Chen, Kuo-Chio Liu
  • Publication number: 20180166328
    Abstract: A method for sawing a semiconductor wafer is provided. The method includes sawing a semiconductor wafer to form a first opening. In addition, the semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape by a die attach film (DAF), and the first opening is formed in an upper portion of the substrate. The method further includes sawing through the substrate and the DAF of the semiconductor wafer from the first opening to form a middle opening under the first opening and a second opening under the middle opening, so that the semiconductor wafer is divided into two dies. In addition, a slope of a sidewall of the middle opening is different from slopes of sidewalls of the first opening and the second opening.
    Type: Application
    Filed: October 5, 2017
    Publication date: June 14, 2018
    Inventors: Yu-Sheng TANG, Fu-Chen CHANG, Cheng-Lin HUANG, Chun-Yen LO, Wen-Ming CHEN, Kuo-Chio LIU
  • Publication number: 20180166409
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Application
    Filed: January 22, 2018
    Publication date: June 14, 2018
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Publication number: 20180033695
    Abstract: An embodiment method includes providing a wafer including a first integrated circuit die, a second integrated circuit die, and a scribe line region between the first integrated circuit die and the second integrated circuit die. The method further includes forming a kerf in the scribe line region and after forming the kerf, using a mechanical sawing process to fully separate the first integrated circuit die from the second integrated circuit die. The kerf extends through a plurality of dielectric layers into a semiconductor substrate.
    Type: Application
    Filed: December 9, 2016
    Publication date: February 1, 2018
    Inventors: Fu-Chen Chang, Cheng-Lin Huang, Wen-Ming Chen
  • Patent number: 9875979
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: January 23, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Patent number: 9748130
    Abstract: A method includes setting a first tension value of a laminating tape during a standby mode. A second tension value of the laminating tape is set during taping on a wafer. The second tension value is different from the first tension value. A third tension value of the laminating tape is set after taping. The third tension value is different from the second tension value.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: August 29, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ming Chen, Wei-Chih Chen, Tung-Hsiao Yu, Min-Yu Wu
  • Publication number: 20170141059
    Abstract: External electrical connectors and methods of forming such external electrical connectors are discussed. A method includes forming an external electrical connector structure on a substrate. The forming the external electrical connector structure includes plating a pillar on the substrate at a first agitation level affected at the substrate in a first solution. The method further includes plating solder on the external electrical connector structure at a second agitation level affected at the substrate in a second solution. The second agitation level affected at the substrate is greater than the first agitation level affected at the substrate. The plating the solder further forms a shell on a sidewall of the external electrical connector structure.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Inventors: Meng-Fu Shih, Chun-Yen Lo, Cheng-Lin Huang, Wen-Ming Chen, Chien-Ming Huang, Yuan-Fu Liu, Yung-Chiuan Cheng, Wei-Chih Huang, Chen-Hsun Liu, Chien-Pin Chan, Yu-Nu Hsu, Chi-Hung Lin, Te-Hsun Pang, Chin-Yu Ku
  • Publication number: 20150200118
    Abstract: A bonding apparatus includes a wafer stage, a first chip stage, a first transporting device, a second stage and a second transporting device. The wafer stage is used for holding a wafer. The first chip stage is used for holding at least one first chip. The first transporting device is used for transporting the first chip from the first chip stage onto the wafer. The second chip stage is used for holding at least one second chip. The second transporting device is used for transporting the second chip from the second chip stage onto the wafer.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Shan WU, Yi-Ting HU, Ming-Tan LEE, Yu-Lin WANG, Yuh-Sen CHANG, Pin-Yi SHIN, Wen-Ming CHEN, Wei-Chih CHEN, Chih-Yuan CHIU
  • Publication number: 20150155195
    Abstract: A method includes setting a first tension value of a laminating tape during a standby mode. A second tension value of the laminating tape is set during taping on a wafer. The second tension value is different from the first tension value. A third tension value of the laminating tape is set after taping. The third tension value is different from the second tension value.
    Type: Application
    Filed: November 29, 2013
    Publication date: June 4, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Ming Chen, Wei-Chih Chen, Tung-Hsiao Yu, Min-Yu Wu
  • Patent number: 8859246
    Abstract: The invention discloses a method for production of polyhydroxybutyrate-co-polyhydroxyvalerate (PHBV) by recombinant Escherichia coli harboring plasmid containing both phaCAB and prpE. Different percentage of hydroxyvalerate can be obtained from the recombinant E. coli when cultivated in the medium containing different concentrations of propionic acid. In this patent, we provide a method that integrated all of the genes (i.e. phaCAB, vgb and prpE) required for PHBV production into a single plasmid. The plasmids were then transformed into an E. coli host. Results showed that PHBV can be produced by this recombinant E. coli, and the ration of HV to HB in the co-polymers can be regulated by addition of different concentrations of propionic acid in the medium. The percentage of HV in the co-polymers can be adjusted from about 3% up to more than 35%.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: October 14, 2014
    Assignee: Yuan Ze University
    Inventors: Chih-Ching Chien, Po-Chi Soo, Yu-Tze Horng, Shan-Yu Chen, Hsiu-Hsiung Li, Yu-Hong Wei, Wen-Ming Chen
  • Patent number: 8387222
    Abstract: A pen barrel assembling device includes a base with a first frame and a second frame fixed to the top of two ends of the base. A movable rod extends through the first frame and fixed to the first frame by a first fixing bolt. An end part is connected to the first end of the movable rod and the outer section is positioned in the end part. A push rod extends through the second frame and is movable toward the movable rod by pivoting a lever. The metal section is connected to the free end of the push rod. Multiple blocks are pivotably or slidably connected to the base and each block includes an engaging recess which is removably engaged with the movable rod.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: March 5, 2013
    Inventors: Wen-Ming Chen, Steven Eugene Siddall
  • Patent number: 8086095
    Abstract: An audio and video (AV) apparatus includes a player module for playing audio and video files, generating audio and video signals, and an internal display and an internal speaker. The AV apparatus further includes: a first switch for generating first instructions; an output module for being externally connected to output the audio and video signals; and a control module connected to the first switch. The control module being configured for disabling the internal display and internal speaker at receiving the first instructions at a situation that the output module is externally connected to output the audio and video signals, and disabling the internal display while keeping the internal speaker enabled at receiving the first instruction at a situation that the output module is not externally connected. A method for controlling the audio and video apparatus is provided as well.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: December 27, 2011
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Lung Hung, Tao Wang, Shi-Ming Zhang, Wang-Chang Duan, Wen-Ming Chen, Pei Liu
  • Patent number: 8072784
    Abstract: An exemplary electronic device includes a controller, a first convertor, a second convertor, and a switching unit. The first convertor is configured for receiving a first voltage from an external power supply and converting the first voltage into a second voltage. The controller is coupled to the first convertor for generating a start signal when receiving the second voltage. The second convertor is connected to the controller for receiving the first voltage, converting the first voltage into a third voltage to power an operating unit of the electronic device, and converting the first voltage into a fourth voltage to power the controller when receiving the start signal. The switching unit is coupled to the controller and the first convertor for disabling the first convertor when the controller receives the fourth voltage. A related power supply unit is also provided.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: December 6, 2011
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Lung Hung, Tao Wang, Wen-Ming Chen, Wang-Chang Duan, Qiang Huang, Shi-Ming Zhang
  • Patent number: 8073161
    Abstract: An audio apparatus includes an input, a first resistor, a first capacitor, an amplifier, a second resistor, a second capacitor, and an output. The input is used for inputting audio signals. The first resistor and the amplifier are serially connected to the input; wherein the first resistor is connected to the inverting input of the amplifier and the non-inverting input of the amplifier is connected to ground. The first capacitor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to ground. The second resistor has one end connected to a node between the first resistor and the inverting input of the amplifier, the other end connected to the output of the amplifier. The second capacitor is connected between the inverting input and the output of the amplifier. The output is connected to the output of the amplifier, for outputting the audio signals after processing.
    Type: Grant
    Filed: July 27, 2008
    Date of Patent: December 6, 2011
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Lung Hung, De-An Zhang, Wen-Ming Chen, Kun Huang, Jie Liu, Shao-Lin Zhang
  • Publication number: 20110094077
    Abstract: A pen barrel assembling device includes a base with a first frame and a second frame fixed to the top of two ends of the base. A movable rod extends through the first frame and fixed to the first frame by a first fixing bolt. An end part is connected to the first end of the movable rod and the outer section is positioned in the end part. A push rod extends through the second frame and is movable toward the movable rod by pivoting a lever. The metal section is connected to the free end of the push rod. Multiple blocks are pivotably or slidably connected to the base and each block includes an engaging recess which is removably engaged with the movable rod.
    Type: Application
    Filed: October 25, 2010
    Publication date: April 28, 2011
    Inventors: Steven Eugene Siddall, Wen-Ming Chen
  • Patent number: 7916440
    Abstract: An electronic device includes an integrated circuit, a power interface, and an interface circuit connected between the integrated circuit and the power interface for protecting the integrated circuit from being damaged by electrostatic discharge. The interface circuit includes a current limit unit connected between the power interface and the integrated circuit for limiting an electrostatic discharge current and an electrostatic protection unit connected to a common node of the power interface and the current limit unit for clamping a voltage of the common node to a predetermined value. A related integrated circuit is also provided.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: March 29, 2011
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Lung Hung, Tao Wang, Shi-Ming Zhang, Wang-Chang Duan, Wen-Ming Chen, Pei Liu
  • Patent number: 7804195
    Abstract: A power supply system for an electronic device includes a first and a second connector, a switch, and a controller. The first connector is used for connecting to a first power source. The second connector is used for connecting to a second power source, wherein the second power source is rechargeable. The switch establishes a connection between the first connector and the second connector so as to allow the first power source to charge the second power source. The controller detects a presence of the first power source and the second power source, and controls the switch to periodically establish the connection at the absence of the second power source, and to continuously establish the connection at the presence of the second power source.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: September 28, 2010
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Chun-Lung Hung, Wang-Chang Duan, Wen-Ming Chen, Tao Wang, Shi-Ming Zhang, Pei Liu