Patents by Inventor Wen-Ping Huang

Wen-Ping Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220204125
    Abstract: An elastic assembly structure for a bicycle pedal includes a pedal, a sole cleat and an elastic element. The elastic element is removably connected between the pedal and the sole cleat by a magnet. In riding a bicycle, the pedal and the sole cleat are expanded and collected with each other elastically, and a user's leg can lift up and put down a rear edge of the sole spontaneously following a circumferential stepping movement, and the rear end of the sole cleat can lift up and drive the rear end of the pedal elastically through the elastic element. Accordingly, the user can stop the bicycle, get off the bicycle or brake the bicycle emergently, simply by lifting up the leg spontaneously to overcome the magnetic force of the magnet, allowing the sole cleat to escape from the pedal rapidly, thereby improving the smoothness and safety in riding the bicycle.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 30, 2022
    Inventor: Wen-Ping HUANG
  • Patent number: 9064856
    Abstract: In the Flip-Chip type LED component built therein with a Zener chip: a Flip-Chip LED chip and a Flip-Chip Zener straddle respectively over and beneath two electrode pins, wherein the Flip-Chip Zener is covered with insulating material to form a base and the Flip-Chip LED chip is covered with a transparent package to thereby form an integral Flip-Chip LED component, hence not only the Flip-Chip LED component can be protected in use, but also can largely simplify the production process and reduce the cost of production.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: June 23, 2015
    Assignee: FORMOSA MICROSEMI CO., LTD.
    Inventors: Wen-Ping Huang, Tzuu-Chi Hu
  • Patent number: 8791551
    Abstract: A well-through type diode element/component manufacturing method which has a pair (pairs) of first and said second electrodes of a diode element/component built on same plane by a process of metallization after a mode of well-through type to penetrate a PN junction depletion region/barrier region, and leads electrons of one of the electrodes to flow through the Depletion/Barrier region without hindrance; the present invention directly conduct the operations of insulation protecting, metallization and the process of elongate welding ball etc., it can independently complete a novel technique of Chip-Scale Package (CSP); it has the features of: grains being exactly the article produced, no need of connecting lines, low energy consumption, low cost and light, thin and small etc.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: July 29, 2014
    Assignee: Formosa Microsemi Co., Ltd.
    Inventors: Wen-Ping Huang, Wen-Hu Wu, His-Piao Lai, Chien-Wu Chen
  • Patent number: 8742533
    Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: June 3, 2014
    Assignee: Formosa Microsemi Co., Ltd
    Inventors: Sheau-Feng Tsai, Wen-Ping Huang, Tzuu-Chi Hu
  • Patent number: 8560867
    Abstract: A method for processing power-off suitable for a server system is provided. The server system includes a first node, a second node, and a power supply. The first and second nodes share the power supply. The method includes the following steps. A power-off process is performed by the first and second nodes respectively according to a power-off signal. An interception process is activated to intercept a completion signal generated in the power-off process, and an interrupt is triggered. The interrupt is performed by an interrupt handler, so as to detect whether the first and second nodes complete a power-off process. When the first and second nodes already complete the power-off process, the interception process is inactivated and the generated completion signal is recovered and transferred to the power supply for turning off a power.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: October 15, 2013
    Assignee: Inventec Corporation
    Inventors: Ying-Chih Lu, Wen-Ping Huang
  • Publication number: 20130241056
    Abstract: A well-through type diode element/component manufacturing method which has a pair (pairs) of first and said second electrodes of a diode element/component built on same plane by a process of metallization after a mode of well-through type to penetrate a PN junction depletion region/barrier region, and leads electrons of one of the electrodes to flow through the Depletion/Barrier region without hindrance; the present invention directly conduct the operations of insulation protecting, metallization and the process of elongate welding ball etc., it can independently complete a novel technique of Chip-Scale Package (CSP); it has the features of: grains being exactly the article produced, no need of connecting lines, low energy consumption, low cost and light, thin and small etc.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: FORMOSA MICROSEMI CO., Ltd.
    Inventors: Wen-Ping HUANG, Wen-Hu Wu, His-Piao Lai, Chien-Wu Chen
  • Publication number: 20130075891
    Abstract: This invention reveals a flip-chip type full-wave rectification semiconductor device which includes at least a PNNP type and/or NPPN type flip-chip, and a sheet stuff or substrate including a plurality pins, and which is characterized in that: all the soldering points (bumps) of the PNNP type and/or the NPPN type flip-chip are on an identical surface, this can make easy connecting of the pins with the bumps of the flip-chips by soldering in pursuance of circuit arrangement of the full-wave rectification device, and complete manufacturing product after the steps of shaping/packing and cutting; such product has a function of making full-wave rectifying, and can simplify the manufacturing process, reduce the manufacturing cost, and get an effect of reducing the size of the product with better heat dissipation, being different from traditional full wave rectification semiconductor devices composed of two/four grains.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Applicant: FORMOSA MICROSEMI CO., Ltd.
    Inventors: Wen-Ping HUANG, Paul Wu
  • Patent number: 8404565
    Abstract: A manufacturing method and a structure of a surface-mounting type diode co-constructed from a silicon wafer and a base plate, in the method, a diffused wafer is stacked with a high temperature durable high strength base plate to have them sintered and molten together for connecting with each other to form a co-constructure; then the diffused wafer is processed by etching and ditching for filling with insulation material, electrodes of the diffused wafer are metalized and all on an identical plane, then production of all functional lines is completed; and then the co-constructure is cut to form a plurality of separated individuals which each forms a surface-mounting type diode to be applied straight. In comparison with the conventional techniques, manufacturing of the present invention is simplified and economic in reducing working hours, size and cost of production and the wafer is not subjected to breaking during manufacturing.
    Type: Grant
    Filed: May 4, 2010
    Date of Patent: March 26, 2013
    Assignee: Formosa Microsemi Co., Ltd.
    Inventors: Wen-Ping Huang, Paul Wu
  • Publication number: 20130049160
    Abstract: This invention reveals a constant current semiconductor device of an N-type or a P-type epitaxial layer on a semi-insulating substrate, the device is treated by using a Schottky barrier to cut off current in conduction channels under certain bias and to provide constant current within cut-off voltage and breakdown voltage region between Schottky barrier section/ohmic contact section as the first electrode and the other ohmic contact section as the second electrode respectively, and has excellent characteristics as lower cut-off voltage (Vkp) than bipolar devices and easily gets higher constant current (Ip) by integrating several constant current units.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: FORMOSA MICROSEMI CO., Ltd.
    Inventors: Sheau-Feng TSAI, Wen-Ping Huang, Tzuu-Chi Hu
  • Publication number: 20120117394
    Abstract: A method for processing power-off suitable for a server system is provided. The server system includes a first node, a second node, and a power supply. The first and second nodes share the power supply. The method includes the following steps. A power-off process is performed by the first and second nodes respectively according to a power-off signal. An interception process is activated to intercept a completion signal generated in the power-off process, and an interrupt is triggered. The interrupt is performed by an interrupt handler, so as to detect whether the first and second nodes complete a power-off process. When the first and second nodes already complete the power-off process, the interception process is inactivated and the generated completion signal is recovered and transferred to the power supply for turning off a power.
    Type: Application
    Filed: June 15, 2011
    Publication date: May 10, 2012
    Applicant: INVENTEC CORPORATION
    Inventors: Ying-Chih Lu, Wen-Ping Huang
  • Publication number: 20110272777
    Abstract: A manufacturing method and a structure of a surface-mounting type diode co-constructed from a silicon wafer and a base plate, in the method, a diffused wafer is stacked with a high temperature durable high strength base plate to have them sintered and molten together for connecting with each other to form a co-constructure; then the diffused wafer is processed by etching and ditching for filling with insulation material, electrodes of the diffused wafer are metalized and all on an identical plane, then production of all functional lines is completed; and then the co-constructure is cut to form a plurality of separated individuals which each forms a surface-mounting type diode to be applied straight. In comparison with the conventional techniques, manufacturing of the present invention is simplified and economic in reducing working hours, size and cost of production and the wafer is not subjected to breaking during manufacturing.
    Type: Application
    Filed: May 4, 2010
    Publication date: November 10, 2011
    Applicant: FORMOSA MICROSEMI CO., Ltd.
    Inventors: Wen-Ping Huang, Paul Wu
  • Publication number: 20110113225
    Abstract: A basic input/output system (BIOS) capable of supporting multi-platforms and a constructing method thereof are provided. In the method, a plurality of segment modules is provided, and each of the segment modules includes more than one BIOS module. A module header is established for each of the BIOS modules and records an application platform identifier (ID) of an applicable platform of the corresponding BIOS module and module type data of the corresponding BIOS module. The segment modules are then integrated according to a design structure of the BIOS. The segment modules are classified into a main system module, a plurality of slave segment modules, and a reset entry segment module. When the reset entry segment module obtains a platform ID of an electronic equipment currently configured with the BIOS, the main system module pre-stores an execution sequence according to the platform ID, and sequentially runs the BIOS modules matching with the platform ID.
    Type: Application
    Filed: April 15, 2010
    Publication date: May 12, 2011
    Applicant: INVENTEC CORPORATION
    Inventors: Ying-Chih Lu, Wen-Ping Huang
  • Publication number: 20100106951
    Abstract: A computer system and a method for a configuration management program transmitting a system information are provided. The method includes the following steps. A first memory is provided, wherein the first memory records at least one system information. An interrupt is enabled from the configuration management program when the configuration management program needs a system information of the computer system, wherein the interrupt has a corresponding command information. An interrupt processing program processes the interrupt so as to perform a corresponding configuration setting operation according to the command information or to return the corresponding system information in the first memory to the configuration management program.
    Type: Application
    Filed: February 20, 2009
    Publication date: April 29, 2010
    Applicant: INVENTEC CORPORATION
    Inventors: Ying-Chih Lu, Wen-Ping Huang, Po-Chin Yang
  • Patent number: 7446401
    Abstract: A designing for a power semiconductor, and especially to a structure of a power semiconductor formed by using the basic materials including two metal plates and a ceramic plate, in the power semiconductor, mainly surfaces of the ceramic base plate provided with a receiving groove is metallized, and the metallic base plates having electric connecting pins extending outwards therefrom are placed at the two lateral sides of the ceramic base plate, then a chip is placed in the receiving groove of the ceramic base plate, and the ceramic base plate is sintered together with the two metallic base plates, thus the structure of the power semiconductor with the twin metal plates and the ceramic plate is formed.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: November 4, 2008
    Inventor: Wen-Ping Huang
  • Publication number: 20070096276
    Abstract: A designing for a power semiconductor, and especially to a structure of a power semiconductor formed by using the basic materials including two metal plates and a ceramic plate, in the power semiconductor, mainly surfaces of the ceramic base plate provided with a receiving groove is metallized, and the metallic base plates having electric connecting pins extending outwards therefrom are placed at the two lateral sides of the ceramic base plate, then a chip is placed in the receiving groove of the ceramic base plate, and the ceramic base plate is sintered together with the two metallic base plates, thus the structure of the power semiconductor with the twin metal plates and the ceramic plate is formed.
    Type: Application
    Filed: November 2, 2005
    Publication date: May 3, 2007
    Inventor: Wen-Ping Huang
  • Publication number: 20050259400
    Abstract: The heat sinking structure of the present invention is fixedly provided on the surface of a crystal layer of a semiconductor with a heat conducting plate made of copper, the heat conducting plate has therein a plurality of channels parallel to the surface of the crystal layer, the channels extend through the heat conducting plate to form passageways for guiding air flow to exhaust, and to speed up the heat exchanging of the heat conducting plate with air, so that a heat sinking structure that is structurally firm, small by volume and high in efficiency of heat sinking as well as easy for processing in manufacturing is obtained.
    Type: Application
    Filed: May 24, 2004
    Publication date: November 24, 2005
    Applicant: FORMOSA MICROSEMI CO., LTD.
    Inventor: Wen-Ping Huang
  • Patent number: 6334971
    Abstract: A manufacturing method for a diode group processed by injection molding on the surface thereof, the diode group is formed by having a plurality of left and right elongate tapes which are pressed to form respectively left and right contact ends, each pair of the left and right elongate tapes have a left lap end and a right lap end to sandwich a chip therebetween. Then injection molding is performed to envelop the left and right elongate tapes and to form an elongate strip having an insulation outer layer with the left and right contact ends exposed and with a recess at the bottom of and between every two neighboring chips. The recesses separate the left contact ends of the left elongate tapes from the right contact ends of the right elongate tapes but still leave the plural diodes in series connected mutually in an insulation state. The strip can be broken off at desire recesses to get a diode group having desired number of diodes processed by injection molding on the surface of the strip.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: January 1, 2002
    Inventor: Wen-Ping Huang
  • Patent number: 6085396
    Abstract: A manufacturing method for rectifying diodes, wherein, a plurality of upper and lower pins are combined with a plurality of electronic chips to form a coarse blank. And then they are processed to form shaped insulating layers by molding. Each insulating layer is processed to have superficial coarseness having micro-protuberances thereon; the areas on both the lateral sides of the insulating layer are applied with electric conductive layer. The electric conductive layer is combined with the insulating layer; they are equidistantly cut with a knife into shaped rectifying diodes. The shaped rectifying diodes each is further electrically plated with a further layer of electric conductive material on both sides of the electric conductive layer to form a harder protection layer, and then finished rectifying diodes are obtained. The upper and lower pins are in the form of thin sheets, plus the small chips, the shaped rectifying diodes have small volumes.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: July 11, 2000
    Inventor: Wen-Ping Huang
  • Patent number: 5668207
    Abstract: A styrenic resin composition with little foul odor is provided. The styrenic resin composition contains:(1) 99.995-95.0 wt % of a styrenic resin which is made from 5-100 wt % of rubbery graft copolymer (A) and 95-0 wt % of styrenic copolymer (B), wherein the rubbery graft copolymer (A) is prepared by graft polymerization of 50 to 90 wt % of vinyl aromatic monomers, 10 to 50 wt % of vinyl cyanide monomers and 0-40 wt % of copolymerizable monomers in the presence of rubbery polymer; and(2) 0.005-5.0 wt % of a sesquiterpene compound (C).
    Type: Grant
    Filed: August 6, 1996
    Date of Patent: September 16, 1997
    Assignee: Chi Mei Corporation
    Inventors: Wen-Ping Huang, Dong-Bi Shiueh