Patents by Inventor Wen-Shan Chang

Wen-Shan Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10497729
    Abstract: An image sensor includes a substrate having a first region and a second region. The image sensor further includes a dielectric layer over the substrate. The image sensor further includes a conductive layer over the dielectric layer, wherein in the first region the conductive layer has a grid shape and in the second region a portion of the conductive layer is concave toward the substrate. The image sensor further includes a protective layer, wherein the protective layer is over the conductive layer in the first region, and over a top surface and along sidewalls of the conductive layer in the second region.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: December 3, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yi Wu, Chun-Chih Lin, Jian-Shin Tsai, Min-Hui Lin, Wen-Shan Chang, Yi-Ming Lin, Chao-Ching Chang, C. H. Chen, Chin-Szu Lee, Y. T. Tsai
  • Publication number: 20190088692
    Abstract: An image sensor includes a substrate having a first region and a second region. The image sensor further includes a dielectric layer over the substrate. The image sensor further includes a conductive layer over the dielectric layer, wherein in the first region the conductive layer has a grid shape and in the second region a portion of the conductive layer is concave toward the substrate. The image sensor further includes a protective layer, wherein the protective layer is over the conductive layer in the first region, and over a top surface and along sidewalls of the conductive layer in the second region.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
  • Publication number: 20180337203
    Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 22, 2018
    Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
  • Patent number: 10134790
    Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: November 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yi Wu, Chun-Chih Lin, Jian-Shin Tsai, Min-Hui Lin, Wen-Shan Chang, Yi-Ming Lin, Chao-Ching Chang, C. H. Chen, Chin-Szu Lee, Y. T. Tsai
  • Patent number: 10050102
    Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Ching Chang, Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Yi-Ming Lin, Chin-Szu Lee, Wen-Shan Chang, Yi-Hui Chen
  • Publication number: 20170207298
    Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 20, 2017
    Inventors: Chao-Ching Chang, Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Yi-Ming Lin, Chin-Szu Lee, Wen-Shan Chang, Yi-Hui Chen
  • Patent number: 9269031
    Abstract: A method receives an intermediate graphical representation (IGR) of a document, the IGR including a plurality of non-intersecting edges and determines a plurality of vertices using the IGR. The vertices include endpoints of the edges and a split point, being determined by splitting a first edge into two or more portions using an endpoint of at least one second edge, wherein the first edge and the second edge are from the plurality of non-intersecting edges, associates vertices from the plurality of vertices with at least one edge from the IGR using endpoints of the one edge, wherein the associating includes selecting, from the determined plurality of vertices, a plurality of neighbouring vertices to said one edge to define a region with the endpoints of the one edge. The method processes the region using at least the endpoints of said one edge and the associated neighbouring vertices.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: February 23, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Wen Shan Chang, David Karlov
  • Publication number: 20150178605
    Abstract: A method receives an intermediate graphical representation (IGR) of a document, the IGR comprising a plurality of non-intersecting edges and determines a plurality of vertices using the IGR. The vertices comprises endpoints of the edges and a split point, being determined by splitting a first edge into two or more portions using an endpoint of at least one second edge, wherein the first edge and the second edge are from the plurality of non-intersecting edges, associates vertices from the plurality of vertices with at least one edge from the IGR using endpoints of the one edge, wherein the associating comprises selecting, from the determined plurality of vertices, a plurality of neighbouring vertices to said one edge to define a region with the endpoints of the one edge. The method processes the region using at least the endpoints of said one edge and the associated neighbouring vertices.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 25, 2015
    Inventors: Wen Shan Chang, David Karlov
  • Publication number: 20120098250
    Abstract: A pipe joint structure for an upright valve includes a pipe joint, a resilient ring, a connection cylinder and an inner sleeve. The pipe joint includes a first chamber to receive a positioning ring and a seal ring. The resilient ring, the connection cylinder and the inner sleeve are inserted in the pipe joint in sequence. When a connection pipe is inserted in the pipe joint, the connection pipe will be inserted in a one-way direction and fastened by fastening talons of the resilient ring. To disengage the connection pipe, top push flanges of resilient claws of the inner sleeve are pushed to an inner limit inclined surface of the positioning ring to disengage the connection pipe from the fastening talons, such that the connection pipe can be pulled out. The present invention provides a quick connection and can prevent the connection pipe from being pulled out unexpectedly.
    Type: Application
    Filed: October 20, 2010
    Publication date: April 26, 2012
    Inventors: YEO-SHAN CHANG, Wen-Shan Chang
  • Patent number: 6851168
    Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: February 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen
  • Publication number: 20030233746
    Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.
    Type: Application
    Filed: June 19, 2002
    Publication date: December 25, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen