Patents by Inventor Wen-Shan Hsiao

Wen-Shan Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Testkey structure and method of measuring device defect or connection defect by using the same
    Patent number: 10145889
    Abstract: A testkey structure including the following components is provided. A fin structure is disposed on a substrate and stretches along a first direction. A first gate structure and a second gate structure are disposed on the fin structure and stretch along a second direction. A first common source region is disposed in the fin structure between the first gate structure and the second gate structure. A first drain region is disposed in the fin structure at a side of the first gate structure opposite to the first common source region. A second drain region disposed in the fin structure at a side of the second gate structure opposite to the first common source region. A testkey structure is symmetrical along a horizontal line crossing the first common source region. The present invention further provides a method of measuring device defect or connection defect by using the same.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: December 4, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuei-Sheng Wu, Wen-Jung Liao, Wen-Shan Hsiao
  • TESTKEY STRUCTURE AND METHOD OF MEASURING DEVICE DEFECT OR CONNECTION DEFECT BY USING THE SAME
    Publication number: 20180292449
    Abstract: A testkey structure including the following components is provided. A fin structure is disposed on a substrate and stretches along a first direction. A first gate structure and a second gate structure are disposed on the fin structure and stretch along a second direction. A first common source region is disposed in the fin structure between the first gate structure and the second gate structure. A first drain region is disposed in the fin structure at a side of the first gate structure opposite to the first common source region. A second drain region disposed in the fin structure at a side of the second gate structure opposite to the first common source region. A testkey structure is symmetrical along a horizontal line crossing the first common source region. The present invention further provides a method of measuring device defect or connection defect by using the same.
    Type: Application
    Filed: April 6, 2017
    Publication date: October 11, 2018
    Inventors: Kuei-Sheng Wu, Wen-Jung Liao, Wen-Shan Hsiao