Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.

Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.

Abstract: An electronic package and a method for fabricating the same are provided. The method includes disposing on a carrier an electronic component having a plurality of conductors, encapsulating the electronic component with an encapsulant, and disposing an electronic device on the encapsulant. The electronic device and the carrier are electrically connected through the conductors, thereby reducing the overall thickness of the electronic package.

Abstract: An electronic package and a method for fabricating the same are provided. The method includes disposing on a carrier an electronic component having a plurality of conductors, encapsulating the electronic component with an encapsulant, and disposing an electronic device on the encapsulant. The electronic device and the carrier are electrically connected through the conductors, thereby reducing the overall thickness of the electronic package.

Abstract: An electronic package and a method of fabricating the same are provided. The method includes disposing an electronic component on a first side of an interposer, forming a first encapsulant on the first side of the interposer to encapsulate the electronic component, forming a plurality of conductive elements on a second side of the interposer, and forming a second encapsulant on the second side of the interposer to encapsulate the conductive elements. During thermal cycling of the electronic package, shrinkage forces of the first encapsulant and the second encapsulant can offset each other so as to mitigate warping of the interposer.

Abstract: A fabrication method of a stacked package structure is provided, which includes the steps of: providing a substrate having at least a semiconductor device disposed thereon; and disposing a semiconductor package on the substrate through a plurality of conductive elements such that the semiconductor device is located between the substrate and the semiconductor package, and forming an encapsulant between the substrate and the semiconductor package to encapsulate the semiconductor device. The encapsulant can be formed on the semiconductor package first and then laminated on the substrate to encapsulate the semiconductor device, or alternatively the encapsulant can be filled between the substrate and the semiconductor package driven by a capillary force after the semiconductor package is disposed on the substrate. Therefore, the present invention alleviates pressure and temperature effects on the package to prevent warpage of the substrate and facilitate fabrication of multi-layer stacked package structures.

Abstract: A lead frame structure is provided, which includes a die pad having a first mounting portion and a second mounting portion separated from the first mounting portion by a gap. The first and second mounting portions are formed with corresponding blocking surfaces bordering the gap, so as to allow a flow rate of an encapsulating resin flowing through the gap during a molding process to be reduced by the blocking surfaces, such that different portions of the encapsulating resin respectively flowing above, in and below the die pad can have substantially the same flow rate, thereby preventing bonding wires from being deformed to cause short circuit and avoiding formation of voids. A semiconductor package with the lead frame structure is also provided.

Abstract: A lead frame structure is provided, which includes a die pad having a first mounting portion and a second mounting portion separated from the first mounting portion by a gap. The first and second mounting portions are formed with corresponding blocking surfaces bordering the gap, so as to allow a flow rate of an encapsulating resin flowing through the gap during a molding process to be reduced by the blocking surfaces, such that different portions of the encapsulating resin respectively flowing above, in and below the die pad can have substantially the same flow rate, thereby preventing bonding wires from being deformed to cause short circuit and avoiding formation of voids. A semiconductor package with the lead frame structure is also provided.

Abstract: An in-situ purge system for charging the interior of a semiconductor wafer pod with nitrogen gas after the pod is exposed to ambient moisture, air and particles in a clean room. A gas supply line extends into the pod interior from a gas source, and a gas exhaust line extends from the pod interior to remove moisture, particles and excess gas from the pod interior as the pod contains a wafer-filled cassette and rests typically on a SMIF arm before transfer to a processing tool or other destination in the facility. The removable bottom door of the pod and the bottom plate of the cassette are modified to receive the gas supply line and the gas exhaust line.

Abstract: An in-situ purge system for charging the interior of a semiconductor wafer pod with nitrogen gas after the pod is exposed to ambient moisture, air and particles in a clean room. A gas supply line extends into the pod interior from a gas source, and a gas exhaust line extends from the pod interior to remove moisture, particles and excess gas from the pod interior as the pod contains a wafer-filled cassette and rests typically on a SMIF arm before transfer to a processing tool or other destination in the facility. The removable bottom door of the pod and the bottom plate of the cassette are modified to receive the gas supply line and the gas exhaust line.