Patents by Inventor Wen-Shan Wei

Wen-Shan Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040058531
    Abstract: A method for preventing metal extrusion in a semiconductor structure is disclosed in this present invention. The point of this invention is that the first metal is suffered to a thermal process before the fabrication of a conformal glue layer into a via onto the first metal layer, and thus the first metal layer will not be extruded by thermal effect any more during the following processes. Therefore, this invention can provide a more efficient method for preventing metal extrusion in a semiconductor structure, and the phenomenon of the raising resistance caused by the metal extrusion can be avoided thereby.
    Type: Application
    Filed: August 8, 2002
    Publication date: March 25, 2004
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yen-Wu Hsieh, Shih-Lung Lee, Ber Wu, Wen-Shan Wei
  • Patent number: 6545245
    Abstract: In accordance with the present invention, a method is provided for dry cleaning a processing chamber. This method comprises the step of introducing a first cleaning process gas into the processing chamber. A plasma is formed from the first cleaning process gas and maintained for a first time period. Next, repeating the step of introducing the cleaning process gas, a second cleaning process gas is introduced into the processing chamber and maintained the plasma for a second time period. As a result, the present invention is capable of removing polymer built up on the processing chamber's interior surfaces to achieve a high yield and maintaining throughput of the substrates in the plasma processing system.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: April 8, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Fu Yeh, Jui-Chun Kuo, Wen-Shan Wei, Wen-Sheng Chien
  • Publication number: 20020162827
    Abstract: In accordance with the present invention, a method is provided for dry cleaning a processing chamber. This method comprises the step of introducing a first cleaning process gas into the processing chamber. A plasma is formed from the first cleaning process gas and maintained for a first time period. Next, repeating the step of introducing the cleaning process gas, a second cleaning process gas is introduced into the processing chamber and maintained the plasma for a second time period. As a result, the present invention is capable of removing polymer built up on the processing chamber's interior surfaces to achieve a high yield and maintaining throughput of the substrates in the plasma processing system.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Inventors: Chia-Fu Yeh, Jui-Chun Kuo, Wen-Shan Wei, Wen-Sheng Chien
  • Patent number: 6281133
    Abstract: The invention describes a method for fabricating an inter-layer dielectric layer. In this method, a plurality of first polysilicon lines, a first inter-layer dielectric layer, and a plurality of second polysilicon lines are formed in sequence on the substrate. A second inter-layer dielectric layer is formed between the plurality of second polysilicon lines and entirely covers the plurality of second polysilicon lines. Afterwards, a spin-on glass layer is formed on the second inter-layer dielectric layer, and then, while using the upper surfaces of the second polysilicon lines as etch end points, the spin-on glass layer and the second inter-layer dielectric layer are etched back to entirely remove the spin-on glass layer and partially remove the second inter-layer dielectric layer over the second polysilicon lines. Subsequently, a cover layer is formed to cover the second polysilicon lines and the remainder of the inter-layer dielectric layer. Finally, an oxide layer is formed to cover the resulting structure.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: August 28, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Hsi-Mao Hsiao, Wen-Shan Wei, Ming-Sheng Kuo, H. C. Yu
  • Patent number: 6133091
    Abstract: A method of fabricating a lower electrode of a capacitor. A sacrificial multilayer is formed on a semiconductor layer. The sacrificial multi-layer is a stack of alternating first and second sacrificial layers. A patterned first mask layer having a first opening above a conductive plug in the semiconductor substrate is formed on the sacrificial multi-layer. A planar spacer is formed on the sidewall of the first opening. A second mask layer is formed to fill the first opening. The planar spacer and the sacrificial multi-layer thereunder are anisotropically etched until the semiconductor substrate is exposed to form a second opening while using the first mask layer and second mask layer as a mask. The first sacrificial layers exposed by the second opening are isotropically etched to form a plurality of recesses. The second opening and the recesses are filled with a conductive material layer. Finally, the first mask layer, second mask layer, and sacrificial multi-layer are removed.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: October 17, 2000
    Assignees: United Silicon Inc., United Microelectronics Corp.
    Inventors: Tong-Hsin Lee, Hsi-Mao Hsiao, Wen-Shan Wei, Chun-Lung Chen