Abstract: A universal substrate for assembling ball grid array (BGA) type integrated circuit packages has a non-conducting matrix, an array of conducting vias extending between top and bottom surfaces of the matrix, and one or more instances of each of two or more different types of fiducial pairs on the top surface of the matrix. Each instance of each different fiducial pair indicates a location of a different via sub-array of the substrate for a different BGA package of a particular package size. The same substrate can be used to assemble BGA packages of different size, thereby avoiding having to design a different substrate for each different BGA package size.

Abstract: A packaged IC device has a power bar assembly with one or more power distribution bars, mounted on top of the IC die, which enables assembly using a lead frame that does not include any power distribution bars. External power supply voltages are brought to the IC die by (i) a corresponding first bond wire that connects a lead frame lead to a corresponding die-mounted power distribution bar and (ii) a corresponding second bond wire that connects the power distribution bar to a corresponding bond pad on the IC die. As such, different types of packaged IC devices having different numbers and/or configurations of power distribution bars can be assembled using a single, generic lead frame design having a die pad, tie bars, and leads, but no power distribution bars.

Abstract: A universal substrate for assembling ball grid array (BGA) type integrated circuit packages has a non-conducting matrix, an array of conducting vias extending between top and bottom surfaces of the matrix, and one or more instances of each of two or more different types of fiducial pairs on the top surface of the matrix. Each instance of each different fiducial pair indicates a location of a different via sub-array of the substrate for a different BGA package of a particular package size. The same substrate can be used to assemble BGA packages of different size, thereby avoiding having to design a different substrate for each different BGA package size.

Abstract: A semiconductor device includes a lead frame, and an integrated circuit die. The lead frame has a flag for supporting the die and leads that surround that flag and die. The lead frame also has ground ring that surrounds the flag and die. First bond wires electrically connect the die to the lead frame leads. An insulating layer is disposed on the ground ring, and a power layer is disposed on the insulating layer. The semiconductor device further includes second bond wires that connect the die to the ground ring and third bond wires that connect the die to the power layer.

Abstract: A semiconductor device includes a semiconductor substrate having opposing first and second main surfaces, a via (TSV) extending from the first main surface of the substrate to the second main surface of the substrate, first electrical connectors formed near the first main surface and second electrical connectors formed near the second main surface. There are insulated bond wires, each extending through the via and having a first end bonded to a respective one of the first electrical connectors and a second end bonded to a respective one of the second electrical connectors. The via may be filled with an encapsulating material.

Abstract: A lead frame includes a lead formed of a conductive material and having first and second ends, opposing first and second main surfaces, and opposing first and second side surfaces each extending between the first and second main surfaces. A polymeric layer is formed at least on the first main surface and the first and second side surfaces of the lead at least proximate the second end of the lead. An opening in the polymeric layer on the first main surface of the lead proximate the second end is provided for connecting the lead to, for example, a semiconductor die via a bond wire.

Abstract: A semiconductor device includes a lead frame, and an integrated circuit die. The lead frame has a flag for supporting the die and leads that surround that flag and die. The lead frame also has ground ring that surrounds the flag and die. First bond wires electrically connect the die to the lead frame leads. An insulating layer is disposed on the ground ring, and a power layer is disposed on the insulating layer. The semiconductor device further includes second bond wires that connect the die to the ground ring and third bond wires that connect the die to the power layer.

Abstract: A dicing blade suitable for cutting a semiconductor wafer has an edge of fine grit for polishing a top surface of the wafer and a protruding part of coarse grit for making an initial cut into the wafer. The blade reduces chipping of the top surface of the wafer and increases throughput by facilitating cutting and polishing in one operation. The blade can dice and polish comparatively thick wafers having narrow scribe lines in a single operation.

Abstract: A lead frame includes a lead formed of a conductive material and having first and second ends, opposing first and second main surfaces, and opposing first and second side surfaces each extending between the first and second main surfaces. A polymeric layer is formed at least on the first main surface and the first and second side surfaces of the lead at least proximate the second end of the lead. An opening in the polymeric layer on the first main surface of the lead proximate the second end is provided for connecting the lead to, for example, a semiconductor die via a bond wire.

Abstract: A semiconductor sensor device is packaged using a lid in which one or more dies are mounted to a substrate within the lid housing and one or more other dies are mounted to the substrate outside of the lid housing. The dies located outside of the lid housing may be encapsulated in a molding compound. In one embodiment, the lid has a vent hole and an active region of a pressure-sensing die located inside the lid housing is covered by a pressure-sensitive gel that together enable ambient atmospheric pressure immediately outside the sensor device to reach the active region of the pressure-sensing die. The sensor device may also have one or more other types of sensor dies, such as an acceleration-sensing die, to form a multi-sensor device.

Abstract: A surface mount semiconductor device has a semiconductor die encapsulated in a molding compound. Electrical contact elements of an intermediate set are disposed on the molding compound. A set of coated wires electrically connect bonding pads of the semiconductor die and the electrical contact elements of the intermediate set. A layer of insulating material covers the coated wires, the die and the electrical contact elements of the intermediate set. Electrically conductive elements are exposed at an external surface of the layer of insulating material and contact respective electrical contact elements of the intermediate set through the layer of insulating material.

Abstract: A surface mount semiconductor device has a semiconductor die encapsulated in a molding compound. Electrical contact elements of an intermediate set are disposed on the molding compound. A set of coated wires electrically connect bonding pads of the semiconductor die and the electrical contact elements of the intermediate set. A layer of insulating material covers the coated wires, the die and the electrical contact elements of the intermediate set. Electrically conductive elements are exposed at an external surface of the layer of insulating material and contact respective electrical contact elements of the intermediate set through the layer of insulating material.