Patents by Inventor Wen-Sung Hsu

Wen-Sung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200152479
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Publication number: 20200091070
    Abstract: A semiconductor package structure including a semiconductor die having a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. A first protective insulating layer covers the first and third surfaces of the semiconductor die. A redistribution layer (RDL) structure is electrically coupled to the semiconductor die and surrounded by the first protective insulating layer on the first surface of the semiconductor die. A first passivation layer covers the first protective insulating layer and the RDL structure. At least one conductive structure passes through the first passivation layer and is electrically coupled to the RDL structure. A method of forming the semiconductor package is also provided.
    Type: Application
    Filed: June 3, 2019
    Publication date: March 19, 2020
    Applicant: MediaTek Inc.
    Inventors: Yen-Yao Chi, Nai-Wei Liu, Ta-Jen Yu, Tzu-Hung Lin, Wen-Sung Hsu
  • Patent number: 10580747
    Abstract: In one configuration, a semiconductor package includes a conductive trace embedded in a base and a semiconductor device mounted on the conductive trace via a conductive structure, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace. In another configuration, a method for fabricating a semiconductor package includes providing a base, forming at least one conductive trace on the base, forming an additional insulation material on the base, and defining patterns upon the additional insulation material, wherein the pattern is formed on at least one conductive trace, wherein the conductive structure is a bump structure and the width of the bump structure is bigger than the width of the conductive trace.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: March 3, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573615
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573616
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a conductive trace embedded in a base. A semiconductor device is mounted on the conductive trace via a conductive structure.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Tzu-Hung Lin, Wen-Sung Hsu, Ta-Jen Yu, Andrew C. Chang
  • Patent number: 10573579
    Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, an interposer mounted on the top surface of the package substrate, a first semiconductor die and a second semiconductor die mounted on the interposer in a side-by-side manner, and a stiffener ring secured to the top surface of the package substrate. The stiffener ring encircles the first semiconductor die and the second semiconductor die. The stiffener ring comprises a reinforcement rib striding across the interposer.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: February 25, 2020
    Assignee: MEDIATEK INC.
    Inventors: Tai-Yu Chen, Wen-Sung Hsu, Sheng-Liang Kuo, Chi-Wen Pan, Jen-Chuan Chen
  • Patent number: 10573536
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: February 25, 2020
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Patent number: 10553526
    Abstract: A semiconductor package is provided. In one configuration, the semiconductor package includes a substrate having a die attach surface. A conductive trace is disposed on the substrate, wherein the conductive trace is elongated and carries a signal or a ground across at least a portion of the substrate. A die is mounted on the die attach surface of the substrate via a conductive pillar bump, the conductive pillar bump being rounded and elongated such that the conductive pillar bump extends along a length of the conductive trace and contacts the conductive trace at an end or at an intermediate portion thereof. The die further includes a metal pad electrically coupling to the conductive pillar bump, wherein the metal pad has a first edge and a second edge substantially vertical to the first edge, and wherein the first edge is not adjacent to the second edge.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 4, 2020
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tzu-Hung Lin, Ta-Jen Yu
  • Publication number: 20200013735
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. A second RDL structure is formed on and electrically coupled to an active surface of the semiconductor die. A ground layer is formed in the first RDL structure. A first molding compound layer is formed on the first RDL structure. A first antenna includes a first antenna element formed in the second RDL structure and a second antenna element formed on the first molding compound layer. Each of the first antenna element and the second antenna element has a first portion overlapping the semiconductor die as viewed from a top-view perspective.
    Type: Application
    Filed: June 25, 2019
    Publication date: January 9, 2020
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Yeh-Chun Kao, Shih-Huang Yeh, Tzu-Hung Lin, Wen-Sung Hsu
  • Patent number: 10515887
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first carrier substrate having a first surface and an opposing second surface. A second carrier substrate is stacked on the first carrier substrate and has a first surface and an opposing second surface that faces the first surface of the first carrier substrate. A semiconductor die is mounted on the first surface of the second carrier substrate. A heat spreader is disposed on the first surface of the first carrier substrate to cover and surround the second carrier substrate and the semiconductor die. A method for forming the semiconductor package structure is also provided.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: December 24, 2019
    Assignee: MediaTek Inc.
    Inventors: Shih-Yi Syu, Chia-Yu Jin, Che-Ya Chou, Wen-Sung Hsu, Nan-Cheng Chen
  • Publication number: 20190348748
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor die surrounded by a first molding compound layer. A redistribution layer (RDL) structure is formed on a non-active surface of the semiconductor die and the first molding compound layer. A second molding compound layer is formed on the RDL structure. An insulating capping layer covers the second molding compound layer. An antenna is electrically coupled to the semiconductor die and includes a first antenna element formed in the RDL structure and a second antenna element formed between the second molding compound layer and the insulating capping layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Tzu-Hung Lin, Wen-Sung Hsu
  • Publication number: 20190348747
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a redistribution layer (RDL) structure formed on a non-active surface of a semiconductor die. An antenna structure includes a first antenna element formed in the RDL structure, a first insulating layer covering the RDL structure, a second insulating layer formed on the first insulating layer, and a second antenna element formed on and in direct contact with the second insulating layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Yeh-Chun Kao, Shih-Huang Yeh, Tzu-Hung Lin, Wen-Sung Hsu
  • Publication number: 20190348756
    Abstract: A method of forming a semiconductor package structure includes providing a first wafer-level package structure having a die region surrounded by a scribe line region. The first wafer-level package structure includes a first encapsulating layer, a first redistribution layer (RDL) structure formed on the first encapsulating layer, a first antenna element formed in the first RDL structure and corresponding to the die region, and a semiconductor die in the first encapsulating layer and corresponding to the die region. A second wafer-level package structure is bonded onto the first RDL structure using a first adhesive layer. The second wafer-level package structure includes a second encapsulating layer attached to the first adhesive layer, and a second antenna element formed on the second encapsulating layer. The second antenna element and the first antenna element form a pitch antenna after the bonding of the second wafer-level package structure.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 14, 2019
    Applicant: MediaTek Inc.
    Inventors: Nai-Wei Liu, Yen-Yao Chi, Tzu-Hung Lin, Wen-Sung Hsu
  • Patent number: 10354974
    Abstract: A chip package structure and a method for forming a chip package are provided. The chip package structure includes a first package which includes at least a semiconductor die, a dielectric structure surrounding the semiconductor die, and a plurality of conductive structures penetrating through the dielectric structure and surrounding the semiconductor die. The package structure also includes an interposer substrate over the first package and a plurality of conductive features in or over the interposer substrate. The package structure further includes a second package over the interposer substrate, and the first package electrically couples the second package through the conductive structures and the conductive features.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 16, 2019
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Andrew C. Chang, Tao Cheng
  • Patent number: 10340199
    Abstract: A packaging substrate includes a core layer having a first surface and a second surface. A group of ground pads is disposed on the second surface within a central region. A group of first power pads is disposed on the second surface within the central region. A plurality of signal pads is disposed on the second surface within a peripheral region that encircles the central region on the second surface. A first block-type via is embedded in the core layer within the central region. The group of ground pads is electrically connected to the first block-type via. A second block-type via is embedded in the core layer within the central region. The group of first power pads is electrically connected to the second block-type via.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: July 2, 2019
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tai-Yu Chen
  • Patent number: 10340198
    Abstract: The invention provides a semiconductor package and a method for fabricating the same. The semiconductor package includes a redistribution layer (RDL) structure, a semiconductor die, a molding compound and a supporter. The RDL structure has a first surface and a second surface opposite to the first surface. The semiconductor die is disposed on the first surface of the RDL structure and electrically coupled to the RDL structure. The molding compound is positioned overlying the semiconductor die and the first surface of the RDL structure. The supporter is positioned beside the semiconductor die and in contact with the first surface of the RDL structure.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: July 2, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ta-Jen Yu, Wen-Sung Hsu
  • Patent number: 10312222
    Abstract: A semiconductor package includes a substrate, a first electronic component, a first conductive layer, a first pillar layer and a first package body. The first electronic component is disposed on the substrate. The first pillar layer connects the first conductive layer and the substrate. The first package body encapsulates the first conductive layer, the first pillar layer and the first electronic component. The first conductive layer is embedded in the first package body.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: June 4, 2019
    Assignee: MEDIATEK INC.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Tao Cheng
  • Publication number: 20190164780
    Abstract: The invention provides a semiconductor package and a method for fabricating a base for a semiconductor package. The semiconductor package includes a base. The base has a device-attach surface. A radio-frequency (RF) device is embedded in the base. The RF device is close to the device-attach surface.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 30, 2019
    Applicant: Media Tek Inc.
    Inventors: Wen-Sung Hsu, Ta-Jen Yu
  • Publication number: 20190164786
    Abstract: An apparatus includes a substrate stage configured to secure a substrate thereon and a motion mechanism configured to rotate the substrate stage. The substrate stage includes a plurality of holding pins for holding an edge of the substrate. Rotating the substrate stage causes a chemical solution dispensed on an upper surface of the substrate to spread outwardly toward the edge of the substrate. At least one of the plurality of holding pins includes at least one opening or at least one tapered side surface, or both, for guiding the chemical solution to flow off the substrate.
    Type: Application
    Filed: February 28, 2018
    Publication date: May 30, 2019
    Inventors: Chia-Lun Chen, Ming-Sung Hung, Po-Jen Shih, Wen-Hung Hsu
  • Patent number: 10242927
    Abstract: A semiconductor package includes a substrate, a first electronic component, a film and a package body. The first electronic component is disposed on the substrate and has an upper surface. The film is disposed on the upper surface of the first electronic component. The package body encapsulates the first electronic component and the film.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: March 26, 2019
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Shih-Chin Lin, Ming-Jen Hsiung