Patents by Inventor Wen-Ting Hsu

Wen-Ting Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250083144
    Abstract: A biochip includes a substrate, an insulating layer, a semiconductor layer, a dielectric layer, a metal layer, and a protective layer. The semiconductor layer is disposed on the insulating layer and has a reaction region. The dielectric layer is disposed on the semiconductor layer and has a first opening. The metal layer is disposed on the dielectric layer and includes a source, a drain, and a wall structure. The wall structure surrounds the first opening, the source, and the drain. The protective layer is disposed on the metal layer and has a flat part, a protruding part, a second opening, and a third opening. The flat part surrounds and defines the second opening. The protruding part is disposed corresponding to the wall structure, and the protruding part surrounds and defines the third opening. The second opening connects the third opening and the first opening to expose the reaction region.
    Type: Application
    Filed: January 30, 2024
    Publication date: March 13, 2025
    Applicant: EPISIL TECHNOLOGIES INC.
    Inventors: Wen Ting Hsu, De Chuan Liu, Kuo Yu Li
  • Patent number: 10134891
    Abstract: A transistor device including a substrate, a gate structure, a first doped region, a second doped region and a body region is provided. The gate structure is disposed on the substrate. The first doped region and the second doped region are respectively disposed in the substrate at one side and another side of the gate structure. The first doped region and the second doped region have a first conductive type. The body region is disposed in the substrate at one side of the first doped region away from the gate structure. The body region has a second conductive type. The body region and the first doped region are separated by a distance, and no isolation structure exists between the body region and the first doped region.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: November 20, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Wen-Ting Hsu, Hong-Ze Lin
  • Publication number: 20180061950
    Abstract: A transistor device including a substrate, a gate structure, a first doped region, a second doped region and a body region is provided. The gate structure is disposed on the substrate. The first doped region and the second doped region are respectively disposed in the substrate at one side and another side of the gate structure. The first doped region and the second doped region have a first conductive type. The body region is disposed in the substrate at one side of the first doped region away from the gate structure. The body region has a second conductive type. The body region and the first doped region are separated by a distance, and no isolation structure exists between the body region and the first doped region.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 1, 2018
    Applicant: United Microelectronics Corp.
    Inventors: Wen-Ting Hsu, Hong-Ze Lin