Patents by Inventor Wen Ting Tsai

Wen Ting Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270905
    Abstract: Apparatus and methods for determining wafer characters are disclosed. In one example, an apparatus is disclosed. The apparatus includes: a processing tool configured to process a semiconductor wafer; a device configured to read an optical character disposed on the semiconductor wafer while the semiconductor wafer is located at the apparatus for wafer fabrication; and a controller configured to determine whether the optical character matches a predetermined character corresponding to the semiconductor wafer based on the optical character read in real-time at the apparatus.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Inventors: Wei-Da KANG, Wen-Ting Tsai
  • Patent number: 11380570
    Abstract: Apparatus and methods for determining wafer characters are disclosed. In one example, an apparatus is disclosed. The apparatus includes: a processing tool configured to process a semiconductor wafer; a device configured to read an optical character disposed on the semiconductor wafer while the semiconductor wafer is located at the apparatus for wafer fabrication; and a controller configured to determine whether the optical character matches a predetermined character corresponding to the semiconductor wafer based on the optical character read in real-time at the apparatus.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Da Kang, Wen-Ting Tsai
  • Publication number: 20210233791
    Abstract: Apparatus and methods for determining wafer characters are disclosed. In one example, an apparatus is disclosed. The apparatus includes: a processing tool configured to process a semiconductor wafer; a device configured to read an optical character disposed on the semiconductor wafer while the semiconductor wafer is located at the apparatus for wafer fabrication; and a controller configured to determine whether the optical character matches a predetermined character corresponding to the semiconductor wafer based on the optical character read in real-time at the apparatus.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 29, 2021
    Inventors: Wei-Da KANG, Wen-Ting TSAI
  • Patent number: 10957571
    Abstract: Apparatus and methods for determining wafer characters are disclosed. In one example, an apparatus is disclosed. The apparatus includes: a processing tool configured to process a semiconductor wafer; a device configured to read an optical character disposed on the semiconductor wafer while the semiconductor wafer is located at the apparatus for wafer fabrication; and a controller configured to determine whether the optical character matches a predetermined character corresponding to the semiconductor wafer based on the optical character read in real-time at the apparatus.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: March 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Da Kang, Wen-Ting Tsai
  • Publication number: 20200075380
    Abstract: Apparatus and methods for determining wafer characters are disclosed. In one example, an apparatus is disclosed. The apparatus includes: a processing tool configured to process a semiconductor wafer; a device configured to read an optical character disposed on the semiconductor wafer while the semiconductor wafer is located at the apparatus for wafer fabrication; and a controller configured to determine whether the optical character matches a predetermined character corresponding to the semiconductor wafer based on the optical character read in real-time at the apparatus.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 5, 2020
    Inventors: Wei-Da KANG, Wen-Ting Tsai
  • Patent number: 8564103
    Abstract: In order to protect IMD layers, particularly low-k dielectrics, a protection film is formed on the sidewall of an opening in the IMD layers prior to etching a trench in the underlying silicon substrate. After etching the trench, such as through a TMAH wet etch, at least part of the protection film can be removed. The protection film can be removed in an anisotropic etch process such that a portion of the protection film remains as a sidewall spacer on the sidewall of the opening within the IMD layers.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: October 22, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bin-Yuan Hung, Sung-Hui Huang, Wen Ting Tsai, Dian-Hau Chen, Ching Wei Hsieh
  • Publication number: 20100308444
    Abstract: In order to protect IMD layers, particularly low-k dielectrics, a protection film is formed on the sidewall of an opening in the IMD layers prior to etching a trench in the underlying silicon substrate. After etching the trench, such as through a TMAH wet etch, at least part of the protection film can be removed. The protection film can be removed in an anisotropic etch process such that a portion of the protection film remains as a sidewall spacer on the sidewall of the opening within the IMD layers.
    Type: Application
    Filed: March 19, 2010
    Publication date: December 9, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bin-Yuan Hung, Sung-Hui Huang, Wen Ting Tsai, Dian-Hau Chen, Ching Wei Hsieh
  • Patent number: 7064085
    Abstract: A feed-forward method and apparatus for controlling spacer width measures spacer width during processing then further processes the spacers in a spacer width adjustment operation to achieve a desired final spacer width. Silicon nitride spacers may be measured after plasma etching and the measured spacer width is automatically compared to the final desired spacer width and a time for further processing is calculated based on a correlation between processing time and spacer width loss. Using computer interface manufacturing, the measured spacer width data is provided to a computer that performs the calculation and provides the further processing time or a recipe to the tool used for the spacer width adjustment operation. The spacer width adjustment operation may be wet processing in an SPM solution that oxidizes the spacers and an HF clean operation may be used to remove the oxidized portion and yield spacer widths within acceptable specification limits.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: June 20, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yih-Song Chiu, Wen-Ting Tsai, Jao-Sheng Huang, Chen-Hsiang Leu
  • Publication number: 20060019479
    Abstract: A feed-forward method and apparatus for controlling spacer width measures spacer width during processing then further processes the spacers in a spacer width adjustment operation to achieve a desired final spacer width. Silicon nitride spacers may be measured after plasma etching and the measured spacer width is automatically compared to the final desired spacer width and a time for further processing is calculated based on a correlation between processing time and spacer width loss. Using computer interface manufacturing, the measured spacer width data is provided to a computer that performs the calculation and provides the further processing time or a recipe to the tool used for the spacer width adjustment operation. The spacer width adjustment operation may be wet processing in an SPM solution that oxidizes the spacers and an HF clean operation may be used to remove the oxidized portion and yield spacer widths within acceptable specification limits.
    Type: Application
    Filed: July 20, 2004
    Publication date: January 26, 2006
    Inventors: Yih-Song Chiu, Wen-Ting Tsai, Jao-Sheng Huang, Chen-Hsiang Leu
  • Patent number: 6972241
    Abstract: A method for forming shallow trench isolation (STI) structure including providing a substrate comprising an overlying hardmask layer; patterning the hardmask layer to form a hardmask layer opening for etching a trench through a substrate thickness portion; etching a trench according to the patterned overlying hardmask layer; carrying out a wet chemical oxidizing process to form an oxidized surface portion on the hardmask layer; carrying out a wet chemical etching process to remove at least a portion of the oxidized surface portion to form the hardmask opening having an enlarged width and the trench opening comprising rounded upper corners; and, forming a completed planarized STI structure filled with oxide.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: December 6, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yih Song Chiu, Jao Sheng Huang, Wen Ting Tsai, Chen Hsiang Leu