Abstract: A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of entries of data to a plurality of input register unit groups of the input buffer respectively and correspondingly. After a predetermined amount of data have been written to the input buffer, the controller writes part of data stored in the input buffer to a corresponding memory block. After the plurality of memory blocks are written, the controller writes data stored in a corresponding memory block to the output buffer. The output control circuit sequentially outputs a plurality of pieces of data stored in a plurality of output register unit groups of the output buffer.

Abstract: The present invention provides a signal processing device including a receiver, a signal processor and a transmitter. The receiver is configured to receive a first video signal. The signal processor is coupled to the receiver and configured to support a plurality of scene modes, select a current scene mode form the plurality of scene modes according to a user input, and operate in the current scene mode to process the first video signal to generate a second video signal. The transmitter is configured to output the second video signal.

Abstract: A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of entries of data to a plurality of input register unit groups of the input buffer respectively and correspondingly. After a predetermined amount of data have been written to the input buffer, the controller writes part of data stored in the input buffer to a corresponding memory block. After the plurality of memory blocks are written, the controller writes data stored in a corresponding memory block to the output buffer. The output control circuit sequentially outputs a plurality of pieces of data stored in a plurality of output register unit groups of the output buffer.

Abstract: A method for improving a convolutional neural network (CNN) to perform computations is provided. The method includes the following steps: determining a number of a plurality of multipliers to be N and a number of a plurality of adders to be N according to a number of convolution kernels used by a plurality of convolution layers; and in response to an i-th convolutional layer of the convolutional neural network performing a convolution operation and N convolution kernels of the i-th convolutional layer being all in a size of K×1×1, using the N multipliers and the N adders to perform a multiplication operation once and an addition operation once for each of the N convolution kernels of the i-th convolutional layer in one cycle, such that N outputs of the N convolution kernels of the i-th convolutional layer are obtained after K cycles.

Abstract: The present invention provides a method and apparatus for de-interlacing video data by using a horizontal motion vector of a horizontal motion between fields. The horizontal motion regarding a target pixel of a frame is compensated if the horizontal motion vector is found to be substantially not null according to the pixels residing in the fields determined by the horizontal motion vector. This results in an upgraded quality of image after the de-interlacing process.

Abstract: A 3D image rendering apparatus is disclosed including: an image motion detector for detecting temporal image motion of a target image object in a first left-eye image or a first right-eye image to generate a temporal motion vector, and for performing image motion detection on the first left-eye image and the first right-eye image to generate a spatial motion vector for the target image object; a depth generator for generating a depth value for the target image object based on the temporal motion vector and the spatial motion vector; an command receiving device for receiving a depth adjusting command; and an image rendering device for adjusting the image position of at least part of image objects in the first left-eye image and the first right-eye image to render a second left-eye image and a second right-eye image.

Abstract: A method for processing video data including a plurality of fields is disclosed. The method includes: dividing the plurality of fields into a plurality of image blocks; examining each image block of a target field to determine whether each image block of the target field corresponds to a film mode or a non-film mode, wherein the target field is one of the plurality of fields; examining each image block of the target field that corresponds to the film mode to determine whether each image block corresponds to a pure film mode or a mix film mode; and utilizing a specific image processing mechanism to process each of the plurality of image blocks.

Abstract: A method for controlling a video data to enter a film mode for processing is disclosed, the video data including a plurality of target fields, the method including: determining whether a target field of the target fields is capable of being merged with a first neighboring field of the target field; if the target field can be merged with the first neighboring field, adding one to a merging number; and repeating the above steps until the merging number is determined to be not less than N, and then entering the film mode to process the video data; wherein N is a positive integer not less than two.

Abstract: The present invention relates to an apparatus and a method thereof for adjusting a luminance of an image signal. The apparatus includes a complementary circuit, a statistical circuit, a calculating circuit, and a blending circuit. The complementary circuit receives an image signal to generate a complementary luminance according to the luminance of the image signal. The statistical circuit receives the image signal to generate a statistical signal according to the luminance of the image signal. The calculating circuit receives the image signal, the complementary luminance, and the statistical signal to generate a calculated luminance of the image signal. The blending circuit generates an output image signal according to the calculated luminance and the luminance of the image signal. A video display device can thereby displays optimum pictures according to the output image signal.

Abstract: The present invention provides an apparatus and a method for de-interlacing. The apparatus includes an edge detection module, a statistics module, and an interpolation circuit. The edge detection module performs an edge detection operation on a plurality of pixels of an image so as to generate edge information corresponding to the image. The statistics module performs a detection window based statistics operation on the edge information so as to generate statistics information corresponding to the image. The interpolation circuit interpolates the image according to the statistics information so as to generate an intra-field interpolation signal corresponding to the image.

Abstract: The present invention relates to an apparatus and a method thereof for adjusting a luminance of an image signal. The apparatus includes a complementary circuit, a statistical circuit, a calculating circuit, and a blending circuit. The complementary circuit receives an image signal to generate a complementary luminance according to the luminance of the image signal. The statistical circuit receives the image signal to generate a statistical signal according to the luminance of the image signal. The calculating circuit receives the image signal, the complementary luminance, and the statistical signal to generate a calculated luminance of the image signal. The blending circuit generates an output image signal according to the calculated luminance and the luminance of the image signal. A video display device can thereby displays optimum pictures according to the output image signal.

Abstract: Methods and apparatuses for motion detection are disclosed. One proposed method includes: detecting at least a field to generate a plurality of statistical values; determining at least one threshold value according to the plurality of statistical values; and performing motion detection on pixel positions of a subsequent field according to the determined threshold value.

Abstract: The present invention provides methods for processing image signals, methods for displaying image signals, and related apparatus. One of the proposed methods includes: performing a predetermined detection on an image signal; partitioning a picture corresponding to the image signal into a plurality of image regions wherein each image region has a plurality of pixels; and computing statistic data for each of the plurality of image regions according to results of the predetermined detection to obtain a plurality of statistic data corresponding to the plurality of image regions.

Abstract: The present invention provides a method and apparatus for de-interlacing video data by using a horizontal motion vector of a horizontal motion between fields. The horizontal motion regarding a target pixel of a frame is compensated if the horizontal motion vector is found to be substantially not null according to the pixels residing in the fields determined by the horizontal motion vector. This results in an upgraded quality of image after the de-interlacing process.

Abstract: A method for processing video data including a plurality of fields is disclosed. The method includes: dividing the plurality of fields into a plurality of image blocks; examining each image block of a target field to determine whether each image block of the target field corresponds to a film mode or a non-film mode, wherein the target field is one of the plurality of fields; examining each image block of the target field that corresponds to the film mode to determine whether each image block corresponds to a pure film mode or a mix film mode; and utilizing a specific image processing mechanism to process each of the plurality of image blocks.

Abstract: A method for controlling a video data to enter a film mode for processing is disclosed, the video data including a plurality of target fields, the method including: determining whether a target field of the target fields is capable of being merged with a first neighboring field of the target field; if the target field can be merged with the first neighboring field, adding one to a merging number; and repeating the above steps until the merging number is determined to be not less than N, and then entering the film mode to process the video data; wherein N is a positive integer not less than two.

Abstract: The present invention provides an apparatus and a method for de-interlacing. The apparatus includes an edge detection module, a statistics module, and an interpolation circuit. The edge detection module performs an edge detection operation on a plurality of pixels of an image so as to generate edge information corresponding to the image. The statistics module performs a detection window based statistics operation on the edge information so as to generate statistics information corresponding to the image. The interpolation circuit interpolates the image according to the statistics information so as to generate an intra-field interpolation signal corresponding to the image.

Abstract: The invention relates to a decoder for decoding a received signal to obtain a corresponding decoded bit series. The signal comprises a plurality of pulses. The decoder comprises a memory, a counting module, a transform module, and a logic module. The memory is for storing a predetermined look-up table; the look-up table comprises plural kinds of edge time duties and the corresponding decoded bit combinations thereof. The counting module is for measuring the edge time duty between high edges and low edges of adjacent pulses of the signal, so as to obtain a first and a second time series. The transform module, according to the look-up table, is for translating the first time series to a first decoded series, and the second time series to a second decoded series. The logic module is for performing a corresponding logic operation on the first and the second decoded series, so as to obtain the decoded bit series.

Abstract: The invention relates to a decoder for decoding a received signal to obtain a corresponding decoded bit series. The signal comprises a plurality of pulses. The decoder comprises a memory, a counting module, a transform module, and a logic module. The memory is for storing a predetermined look-up table; the look-up table comprises plural kinds of edge time duties and the corresponding decoded bit combinations thereof. The counting module is for measuring the edge time duty between high edges and low edges of adjacent pulses of the signal, so as to obtain a first and a second time series. The transform module, according to the look-up table, is for translating the first time series to a first decoded series, and the second time series to a second decoded series. The logic module is for performing a corresponding logic operation on the first and the second decoded series, so as to obtain the decoded bit series.