Abstract: A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.

Abstract: An electronic device has a processing system and a management circuit. The processing system executes an application. The management circuit detects an operating behavior of the application during execution of the application, analyzes the detected operating behavior of the application to generate an application identification result, and configures an application-dependent task according to at least the application identification result.

Abstract: Methods and apparatus are provided for adaptive thermal slope control for dynamic thermal management. In one novel aspect, the device monitors and obtains sampling temperatures, calculates a thermal-slope index, determines whether the calculated thermal-slope index is greater than a predefined slope threshold, adjusts a power budget based on a thermal-slope algorithm, and applies the dynamic thermal management (DTM) adaptively based on the adjusted power budget. In one embodiment, fixed slope algorithm is used. The power budget is adjusted such that an adjusted slope of temperatures stays at a constant. In another embodiment, the time prediction algorithm is used. The power budget is adjusted such that a predicted time to reach a predefined thermal threshold stays a constant. In one embodiment, the time-prediction algorithm is a time-to-target-point (T2TP) algorithm. The T2TP is obtained using a linear equation or a LOG equation.

Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: The present invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: A method and a computer-readable medium for dynamically managing power of a multi-core processor of a computing system are provided. The multi-core processor generates a dynamic voltage and frequency scaling (DVFS) table, determines a first index by alternatively selecting either a power budget or a required performance thereof, determines a current thread level parallelism (TLP) of the computing system, selects one of entries according to the current TLP and the first index, and configure first cores and second cores thereof according to a first settings and a second settings of the selected entry.

Abstract: The present invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: An electronic device has a processing system and a management circuit. The processing system executes an application. The management circuit detects an operating behavior of the application during execution of the application, analyzes the detected operating behavior of the application to generate an application identification result, and configures an application-dependent task according to at least the application identification result.

Abstract: A method for inserting characteristic extractor is provided. The method includes parsing a transaction level model (TLM) of an electronic device of a target system to find out at least one target point of an operation status of the electronic device; and inserting at least one characteristic extractor into the at least one target point.

Abstract: A transaction level (TL) system power estimation method and system are provided. The method includes inserting at least a characteristic extractor into an electronic device of a target system. The characteristic extractor extracts at least a power characteristic of the electronic device when a TL simulation is proceeding. The power characteristic provided from the characteristic extractor is converted to at least a power consumption value by using a power model. The power consumption value is recorded into a power database, for analyzing power consumption of the whole target system. In some embodiments, the TL system power estimation method and system can be applied in the target system with dynamic power management. The TL system power estimation method and system also can be used with a high-level synthesizer to develop the power-aware electronic device in a short time.

Abstract: A transaction level (TL) system power estimation method and system are provided. The method includes inserting at least a characteristic extractor into an electronic device of a target system. The characteristic extractor extracts at least a power characteristic of the electronic device when a TL simulation is proceeding. The power characteristic provided from the characteristic extractor is converted to at least a power consumption value by using a power model. The power consumption value is recorded into a power database, for analyzing power consumption of the whole target system. In some embodiments, the TL system power estimation method and system can be applied in the target system with dynamic power management. The TL system power estimation method and system also can be used with a high-level synthesizer to develop the power-aware electronic device in a short time.

Abstract: A power consumption model for a memory device is provided. According to each characteristic vector, a corresponding power lookup table is built. Each characteristic vector comprises an operating mode and a variation of the data and/or address status of the memory device.

Abstract: A power consumption model for a memory device is provided. According to each characteristic vector, a corresponding power lookup table is built. Each characteristic vector comprises an operating mode and a variation of the data and/or address status of the memory device.