Abstract: An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.

Abstract: A ceiling fan and a structure thereof are provided. The structure includes a blade holder, a plurality of blades, and a plurality of positioning elements. The blade holder includes a holder body and a plurality of support platforms. The holder body has a plurality of first matching structures spaced apart from each other. Each of the support platforms includes a first positioning structure. Each of the blades has a second matching structure and a second positioning structure. The second matching structures can be guided by the first matching structures, so that each of the blades is disposed at an installation position on one of the support platforms along an oblique track. When each of the blades is located at the installation position, the first positioning structures and the second positioning structures abut against each other.

Abstract: A probiotic composition for improving an effect of a chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is disclosed in the present disclosure. The probiotic composition comprises an effective amount of Lactobacillus paracasei GMNL-133, an effective amount of Lactobacillus reuteri GMNL-89, and a pharmaceutically acceptable carrier, wherein the Lactobacillus paracasei GMNL-133 was deposited in the China Center for Type Culture Collection on Sep. 26, 2011 under an accession number CCTCC NO. M 2011331, and the Lactobacillus reuteri GMNL-89 was deposited in the China Center for Type Culture Collection on Nov. 19, 2007 under an accession number CCTCC NO. M 207154. A method for improving the effect of the chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is further disclosed in the present disclosure.

Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.

Abstract: An optical path folding element includes a main body, a light absorption film layer and a matte structure. The main body has optical surface including an incident surface, a reflective surface and an emitting surface. A light enters into the optical folding element through the incident surface. The reflective surface reflects the light so as to change a traveling direction thereof. The light exits the optical folding element through the emitting surface. The light absorbing film layer is configured to reduce reflectance and provided adjacent to at least part of the optical surface, and the light absorbing film layer is in physical contact with the main body. The matte structure is disposed adjacent to at least part of the optical surface. The matte structure provides an undulating profile on a surface of the optical path folding element, and the matte structure is formed in one-piece with the main body.

Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.

Abstract: Provided are a package structure having a joint structure and a method of forming the same. The package structure includes: a first under bump metallurgy (UBM) structure disposed on a first dielectric layer, wherein the first UBM structure at least comprises: a barrier layer embedded in the first dielectric layer; and an upper metal layer disposed over the barrier layer, wherein a sidewall of the barrier layer is laterally offset outward from a sidewall of the upper metal layer, and a portion of a top surface of the barrier layer is exposed by the first dielectric layer; and a solder layer disposed on the first UBM structure and contacting the upper metal layer.

Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.

Abstract: An energy storage system has a battery device, a first terminal, a second terminal, a capacitor device and a DC/DC converter. The first and second terminals are respectively connected two electrodes of the battery device, and the two electrodes have opposite polarities. The capacitor device is electrically connected to the first and second terminals in parallel. The DC/DC converter is electrically connected between the first terminal and the capacitor device. The battery device composed of at least one secondary battery and the capacitor device composed of at least one capacitor are electrically connected to each other in parallel, and by combining with the DC/DC converter, configuring the relation between the equivalent series resistor of the capacitor device and the internal resistor of the battery device, and/or configuring the upper current limit of the rated current of range the DC/DC converter, the battery cycle life is increased.

Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.

Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: A transporting device can transport at least one product, the transporting device includes a mounting frame, a driving mechanism, a transmitting mechanism including a plurality of bent portions, a plurality of guiding mechanisms, and a supporting mechanism. Each guiding mechanism includes a rotating wheel and a guiding plate. Each bent portion is connected to the rotating wheel. The guiding plate is connected to the rotating wheel. The supporting mechanism can support the product. The driving mechanism is further connected to the rotating wheel and can drive the transmitting mechanism to rotate to drive the supporting mechanism to move. The driving mechanism is further connected to the guiding plate, the guiding plate and the rotating wheel can synchronously rotate to drive the supporting mechanism to pass through the bent portions. The present disclosure further provides a heating device.

Abstract: Microelectromechanical devices and methods of manufacture are presented. Embodiments include bonding a mask substrate to a first microelectromechanical system (MEMS) device. After the bonding has been performed, the mask substrate is patterned. A first conductive pillar is formed within the mask substrate, and a second conductive pillar is formed within the mask substrate, the second conductive pillar having a different height from the first conductive pillar. The mask substrate is then removed.

Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.

Abstract: The present invention discloses a multi-contact battery structure comprising at least one battery cell and a protection circuit module. The cell comprises a cell body and a first connection end and a second connection end disposed on different sides of the cell body. The protection circuit module is connected to the first or second connection end. Using the above-mentioned components, a plurality of battery cells are connected through the first or second connection end of each cell body according to the needs of different battery capacities, to form an electrically parallel connection and a battery assembly with different rated capacities, further to form a battery module assembly by the combination, to reduce the waste of electronic products and the carbon emission from the factory production process, to achieve the goal of global environmental protection.

Abstract: A light source module and a display device are provided. The light source module includes a light source, a light guide plate, and an optical film set including multiple first optical microstructures having a first surface, multiple second optical microstructures having a second surface, and multiple third optical microstructures having a third surface. Each of the multiple first optical microstructures has a first vertex angle, each of the multiple second optical microstructures has a second vertex angle, and each of the multiple third optical microstructures has a third vertex angle. The third vertex angle is less than the first vertex angle, and the first vertex angle is less than or equal to the second vertex angle. By configuring the aforementioned optical microstructures, the light source module of the disclosure may greatly improve the collimation of light and has favorable luminance.

Abstract: The present application relates to the field of semiconductor manufacturing technologies, and in particular to a method and an apparatus for automatically processing wafers. The method for automatically processing the wafers includes the following steps: providing several wafers, wherein the wafers operate on a primary path, and the primary path is a path for forming semiconductor structures on the surfaces of the wafers; determining whether there is a need for detecting defects of the wafers, and if yes, automatically switching an operating path of the wafers to a secondary path; detecting the defects of the wafers in the secondary path; and determining whether the defect detection on the wafers is finished, and if yes, automatically switching the operating path of the wafers to the primary path. The application makes it possible to automatically detect the defects of the wafers with different SWR conditions, thereby improving the automation degree of machines.

Abstract: The present invention discloses an anti-aging composition, which includes: (a) isolated lactic acid bacterial strains or a fermented product thereof; and (b) an excipient, a diluent, or a carrier; wherein the isolated lactic acid bacterial strains include: Bifidobacterium bifidum VDD088 strains, Bifidobacterium breve Bv-889 strains, and Bifidobacterium longum BLI-02 strains. The present invention further provides a method for preventing aging by administering the foregoing anti-aging composition to a subject in need thereof.

Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate, active devices and transparent conductive patterns. The active devices are formed on the semiconductor substrate. The transparent conductive patterns are formed over the active devices and electrically connected to the active devices. The transparent conductive patterns are made of a metal oxide material. The metal oxide material has a first crystalline phase with a prefer growth plane rich in oxygen vacancy, and has a second crystalline phase with a prefer growth plane poor in oxygen vacancy.