Patents by Inventor Wen Weng
Wen Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8759943Abstract: A transistor includes a notched fin covered under a shallow trench isolation layer. One or more notch may be used, the size of which may vary along a lateral direction of the fin. In some embodiments, The notch is formed using anisotropic wet etching that is selective according to silicon orientation. Example wet etchants are tetramethylammonium hydroxide (TMAH) or potassium hydroxide (KOH).Type: GrantFiled: October 8, 2010Date of Patent: June 24, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Tseng, Da-Wen Lin, Chien-Tai Chan, Chia-Pin Lin, Li-Wen Weng, An-Shen Chang, Chung-Cheng Wu
-
Publication number: 20140119060Abstract: A power converter includes a full-bridge converter circuit and a regulation circuit. The full-bridge converter circuit includes a full-bridge circuit having a first and a second input terminals and a first and a second output terminals. The regulation circuit is bridged across the first and the second input terminals of the full-bridge circuit and connected to the first output terminal of the full-bridge circuit. The regulation circuit is configured for operatively regulating an output voltage across the first and the second output terminals of the full-bridge circuit by cooperating with the full-bridge converter circuit, such that the output voltage across the first and the second output terminals of the full-bridge circuit has more than three voltage levels. A method for controlling a power converter is also disclosed herein.Type: ApplicationFiled: January 2, 2013Publication date: May 1, 2014Applicant: DELTA ELECTRONICS, INC.Inventors: Xuan-Cai ZHU, Bing-Wen WENG
-
Patent number: 8426923Abstract: A system and method for manufacturing multiple-gate semiconductor devices is disclosed. An embodiment comprises multiple fins, wherein intra-fin isolation regions extend into the substrate less than inter-fin isolation regions. Regions of the multiple fins not covered by the gate stack are removed and source/drain regions are formed from the substrate so as to avoid the formation of voids between the fins in the source/drain region.Type: GrantFiled: June 9, 2010Date of Patent: April 23, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung Ying Lee, Li-Wen Weng, Chien-Tai Chan, Da-Wen Lin, Hsien-Chin Lin
-
Publication number: 20120086053Abstract: A transistor includes a notched fin covered under a shallow trench isolation layer. One or more notch may be used, the size of which may vary along a lateral direction of the fin. In some embodiments, The notch is formed using anisotropic wet etching that is selective according to silicon orientation. Example wet etchants are tetramethylammonium hydroxide (TMAH) or potassium hydroxide (KOH).Type: ApplicationFiled: October 8, 2010Publication date: April 12, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Hung TSENG, Da-Wen LIN, Chien-Tai CHAN, Chia-Pin LIN, Li-Wen WENG, An-Shen CHANG, Chung-Cheng WU
-
Publication number: 20110274877Abstract: A method for manufacturing a metal base laminate includes the steps of providing a metal board having a first through-hole; forming a stack-up structure on at least one side of the metal board, wherein a resin film layer, a prepreg layer, and a metal foil layer are disposed in sequence on a metal board-bordered side of the stack-up structure; and laminating the metal board and the stack-up structure together. The method is effective in enhancing mechanical strength, reducing voids which might otherwise be left in through-holes not fully filled in a conventional via filling process, and further enhancing the processing characteristics of the metal base laminate thus manufactured, by using a prepreg and a resin film concurrently as an insulating material. A metal base laminate manufactured by the method is further introduced.Type: ApplicationFiled: May 2, 2011Publication date: November 10, 2011Inventors: Li-Chih Yu, Jen-Wen Wang, Ching-Hsin Ho, Yi-Wen Weng
-
Publication number: 20110127610Abstract: A system and method for manufacturing multiple-gate semiconductor devices is disclosed. An embodiment comprises multiple fins, wherein intra-fin isolation regions extend into the substrate less than inter-fin isolation regions. Regions of the multiple fins not covered by the gate stack are removed and source/drain regions are formed from the substrate so as to avoid the formation of voids between the fins in the source/drain region.Type: ApplicationFiled: June 9, 2010Publication date: June 2, 2011Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung Ying Lee, Li-Wen Weng, Chien-Tai Chan, Da-Wen Lin, Hsien-Chin Lin
-
Publication number: 20090177982Abstract: A method for retrieving real-time network information is provided. At least one subscribed web page and at least one data field in the page are set via an operating interface provided by a mobile communication device and at least one comparison data corresponding to the data field is set. Contents of the subscribed web page are retrieved via a network using the mobile communication device and are compared with the comparison data to determine whether the contents have been changed. If it is determined that the contents have been changed, a notice message is sent by the mobile communication device and displayed on the screen of the mobile communication device.Type: ApplicationFiled: August 14, 2008Publication date: July 9, 2009Inventors: Shih-Wen WENG, Hsiao-Pei Shih
-
Publication number: 20090111327Abstract: The present invention relates to a HDMI snap-in coupler, which comprises a circuit board, a first HDMI connection port module, a second HDMI connection port module, a top housing, and bottom housing. The first and second HDMI connection port modules are set on the circuit board. The top housing accommodates the circuit board, and the first and second HDMI connection port modules. The top housing has a first opening. The first HDMI connection port module is placed in the first opening. The bottom housing lodges in the top housing and has a second opening. The second HDMI connection port module is placed in the second opening. The present invention provides a HDMI snap-in coupler with double-side HDMI interfaces suitable for installing on current common socket panels (such as: information panels or multimedia information panels) without the need of modifying the design of the socket panels. Thereby, market universality and integration purposes can be achieved.Type: ApplicationFiled: October 26, 2007Publication date: April 30, 2009Inventors: Ching Wen Weng, Chiao Lan Yeh
-
Patent number: 7089997Abstract: A heat exchanger that uses water liquid and vapor phases transformation to enhance heat exchange performance mainly includes a primary heat exchanger, a water vaporization device and an auxiliary heat exchanger. The auxiliary heat exchanger has an upper heat exchange tube on an upper end and a lower heat exchange tube on a lower end thereof. The upper and lower heat exchange tubes are connected by a plurality of vertical heat tubes. Refrigerant and water serve as heat exchange media to pre-cool (pre-heat) air intake. The auxiliary heat exchanger and water vaporization device can generate liquid and vapor phases transformation to increase water content in the air to enhance heat exchange effect of the air, thereby to enhance heat exchange performance of the heat exchanger, and save energy and reduce thermal pollution.Type: GrantFiled: December 23, 2003Date of Patent: August 15, 2006Assignee: Cohand Technology Co., Ltd.Inventors: Kuo-Liang Weng, Ming-Tsun Ke, Jing-Wen Weng
-
Publication number: 20060036923Abstract: Disclosed herein are various embodiments of methods, systems, and apparatus for encoding OFDM packets in a digital communication system. In one exemplary method embodiment, LDPC codewords in an IEEE 802.11 wireless transmission are shortened, decreasing the iterations necessary to insure accurate communications. The codewords are shortened by adding known bits in predetermined locations in the last data symbol of a packet.Type: ApplicationFiled: August 12, 2005Publication date: February 16, 2006Inventors: David Hedberg, Cimarron Mittelsteadt, Wen Weng
-
Publication number: 20050133195Abstract: A heat exchanger that uses water liquid and vapor phases transformation to enhance heat exchange performance mainly includes a primary heat exchanger, a water vaporization device and an auxiliary heat exchanger. The auxiliary heat exchanger has an upper heat exchange tube on an upper end and a lower heat exchange tube on a lower end thereof. The upper and lower heat exchange tubes are connected by a plurality of vertical heat tubes. Refrigerant and water serve as heat exchange media to pre-cool (pre-heat) air intake. The auxiliary heat exchanger and water vaporization device can generate liquid and vapor phases transformation to increase water content in the air to enhance heat exchange effect of the air, thereby to enhance heat exchange performance of the heat exchanger, and save energy and reduce thermal pollution.Type: ApplicationFiled: December 23, 2003Publication date: June 23, 2005Inventors: Kuo-Liang Weng, Ming-Tsun Ke, Jing-Wen Weng
-
Publication number: 20050130505Abstract: The present invention relates to an assembled structure of a connector, which comprises a printed circuit board (PCB), an I/O port, a connector socket configured on a jack frame, wherein spring jackwires in the I/O port and beam contacts in the connector socket form spring plates, so that the spring plates can get a close contact with corresponding terminals and the jackwire block and the connector block can be fixed on the PCB when the jackwire block in the I/O port and the slot in the connector socket joins corresponding terminals on the PCB respectively.Type: ApplicationFiled: December 10, 2003Publication date: June 16, 2005Inventor: Ching-Wen Weng
-
Publication number: 20050099243Abstract: A transmission line structure on base board is proposed to arrange an elliptical or, paper-clip shaped lead-wire wound pattern adjacent to the output end of every independent lead wire to thereby enlarge the area enclosed by the lead wires and accordingly to enhance the capacitance of the base board, compensate the circuit signals, and make shrinkage of the circuit board possible.Type: ApplicationFiled: November 11, 2003Publication date: May 12, 2005Inventor: Ching-Wen Weng
-
Patent number: 6796140Abstract: A heat exchanger with improved heat exchange capability mainly includes a primary heat exchanger, a water vaporization device and a secondary heat exchanger. The secondary heat exchanger may be coupled with the water vaporization device to generate liquid and vapor phase transformation to increase heat exchange capability of the heat exchanger and save energy and reduce thermal pollution.Type: GrantFiled: December 10, 2003Date of Patent: September 28, 2004Assignee: Cohand Technology Co., Ltd.Inventors: Kuo-Liang Weng, Ming-Tsun Ke, Jing-Wen Weng
-
Patent number: 6790756Abstract: A method for creating a self-aligned channel implant with elevated source/drain areas. Forming a thin dielectric layer on top of a silicon substrate, a thick layer of oxide is deposited over this dielectric. An opening is exposed and etched through the layer of oxide, through the dielectric and into the underlying silicon substrate creating a shallow trench in the substrate. By performing the channel implant LDD implant, pocket implant, forming the gate spacers and electrode, removing the thick layer of oxide and forming the S/D regions a gate electrode has been created with elevated S/D regions. By forming the gate spacers, performing channel implant, forming the gate electrode, removing the thick layer of oxide and performing S/D implant a gate electrode has been created with elevated S/D regions and disposable spacers.Type: GrantFiled: March 11, 2003Date of Patent: September 14, 2004Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Chu-Wei Hu, Jiue-Wen Weng, Chung-Te Lin, So Wein Kuo
-
Publication number: 20030170957Abstract: A method for creating a self-aligned channel implant with elevated source/drain areas. Forming a thin dielectric layer on top of a silicon substrate, a thick layer of oxide is deposited over this dielectric. An opening is exposed and etched through the layer of oxide, through the dielectric and into the underlying silicon substrate creating a shallow trench in the substrate. By performing the channel implant LDD implant, pocket implant, forming the gate spacers and electrode, removing the thick layer of oxide and forming the S/D regions a gate electrode has been created with elevated S/D regions. By forming the gate spacers, performing channel implant, forming the gate electrode, removing the thick layer of oxide and performing S/D implant a gate electrode has been created with elevated S/D regions and disposable spacers.Type: ApplicationFiled: March 11, 2003Publication date: September 11, 2003Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventors: Chu-Wei Hu, Jiue-Wen Weng, Chung-Te Lin, So Wein Kuo
-
Patent number: 6583017Abstract: A method for creating a self-aligned channel implant with elevated source/drain areas. Forming a thin dielectric layer on top of a silicon substrate, a thick layer of oxide is deposited over this dielectric. An opening is exposed and etched through the layer of oxide, through the dielectric and into the underlying silicon substrate creating a shallow trench in the substrate. By performing the channel implant LDD implant, pocket implant, forming the gate spacers and electrode, removing the thick layer of oxide and forming the S/D regions a gate electrode has been created with elevated S/D regions. By forming the gate spacers, performing channel implant, forming the gate electrode, removing the thick layer of oxide and performing S/D implant a gate electrode has been created with elevated S/D regions and disposable spacers.Type: GrantFiled: August 10, 2001Date of Patent: June 24, 2003Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Chu-Wei Hu, Jiue-Wen Weng, Chung-Te Lin, So-Wein Kuo
-
Publication number: 20020182815Abstract: A method for creating a self-aligned channel implant with elevated source/drain areas. Forming a thin dielectric layer on top of a silicon substrate, a thick layer of oxide is deposited over this dielectric. An opening is exposed and etched through the layer of oxide, through the dielectric and into the underlying silicon substrate creating a shallow trench in the substrate. By performing the channel implant LDD implant, pocket implant, forming the gate spacers and electrode, removing the thick layer of oxide and forming the S/D regions a gate electrode has been created with elevated S/D regions. By forming the gate spacers, performing channel implant, forming the gate electrode, removing the thick layer of oxide and performing S/D implant a gate electrode has been created with elevated S/D regions and disposable spacers.Type: ApplicationFiled: August 10, 2001Publication date: December 5, 2002Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventors: Chu-Wei Hu, Jiue-Wen Weng, Chung-Te Lin, So-Wein Kuo
-
Publication number: 20020182814Abstract: A method for creating a self-aligned channel implant with elevated source/drain areas. Forming a thin dielectric layer on top of a silicon substrate, a thick layer of oxide is deposited over this dielectric. An opening is exposed and etched through the layer of oxide, through the dielectric and into the underlying silicon substrate creating a shallow trench in the substrate. By performing the channel implant LDD implant, pocket implant, forming the gate spacers and electrode, removing the thick layer of oxide and forming the SID regions a gate electrode has been created with elevated SID regions. By forming the gate spacers, performing channel implant, forming the gate electrode, removing the thick layer of oxide and performing SID implant a gate electrode has been created with elevated SID regions and disposable spacers.Type: ApplicationFiled: August 10, 2001Publication date: December 5, 2002Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANYInventors: Chu-Wei Hu, Jiue-Wen Weng, Chung-Te Lin, So-Wein Kuo
-
Publication number: 20020162342Abstract: A process for controlling an air conditioner/heater by thermal storage comprises the steps of sending ambient temperature of at least one enclosed space sensed by a plurality of sensors to CPU for comparison with a predetermined value; switching to operate in one of air conditioning, heating, and hot water supplying modes; and if switching to the air conditioning mode and the temperature of thermal storage is less than or equal to the predetermined value, a compressor is turned off, an outdoor fan motor is turned off, and a solenoid-controlled valve is turned on to cause the process to enter into a melting cycle. With this automatic switching, the operation is maintained at an optimum, resulting in an increase of thermal efficiency.Type: ApplicationFiled: May 1, 2001Publication date: November 7, 2002Inventors: Kuo-Liang Weng, Ming-Tsun Ke, Jing-wen Weng