Patents by Inventor WEN-YANG CHU

WEN-YANG CHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240188454
    Abstract: Some embodiments relate to an integrated circuit including one or more memory cells arranged over a semiconductor substrate between an upper metal interconnect layer and a lower metal interconnect layer. A memory cell includes a bottom electrode disposed over the lower metal interconnect layer, a data storage or dielectric layer disposed over the bottom electrode, and a top electrode disposed over the data storage or dielectric layer. An upper surface of the top electrode is in direct contact with the upper metal interconnect layer without a via or contact coupling the upper surface of the top electrode to the upper metal interconnect layer. Sidewall spacers are arranged along sidewalls of the top electrode, and have bottom surfaces that rest on an upper surface of the data storage or dielectric layer.
    Type: Application
    Filed: February 16, 2024
    Publication date: June 6, 2024
    Inventors: Chih-Yang Chang, Wen-Ting Chu
  • Patent number: 11944021
    Abstract: Some embodiments relate to an integrated circuit including one or more memory cells arranged over a semiconductor substrate between an upper metal interconnect layer and a lower metal interconnect layer. A memory cell includes a bottom electrode disposed over the lower metal interconnect layer, a data storage or dielectric layer disposed over the bottom electrode, and a top electrode disposed over the data storage or dielectric layer. An upper surface of the top electrode is in direct contact with the upper metal interconnect layer without a via or contact coupling the upper surface of the top electrode to the upper metal interconnect layer. Sidewall spacers are arranged along sidewalls of the top electrode, and have bottom surfaces that rest on an upper surface of the data storage or dielectric layer.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yang Chang, Wen-Ting Chu
  • Publication number: 20230081707
    Abstract: A system and method is provided for processing a whole slide image, WSI, of a biopsy such as a core needle biopsy or a vacuum assisted biopsy. A skeleton of the shape of the detected tissue is created and a skeleton path is determined. An image is generated comprising a line representing the skeleton path with different line representations along the line representing different tissue pathologies. A pathology summary for the overall line is also prepared. This provides the information desired by a pathologist in a most convenient format and representation.
    Type: Application
    Filed: January 27, 2021
    Publication date: March 16, 2023
    Inventors: LIONEL MICHEL BLANCHET, LAURIE BAX, CARLOS SÀNCHEZ SÀNCHEZ C, DUYGU BUYUKAYDIN, WEN-YANG CHU, ANJA VAN GESTEL